Timeline for EMI/Y-capacitor in inverter phase outputs?
Current License: CC BY-SA 3.0
21 events
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Jan 4 at 19:06 | history | bumped | CommunityBot | This question has answers that may be good or bad; the system has marked it active so that they can be reviewed. | |
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Mar 3, 2023 at 15:14 | answer | added | Tim Williams | timeline score: 1 | |
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Feb 14, 2018 at 21:28 | answer | added | UweD | timeline score: 0 | |
Feb 14, 2018 at 21:20 | comment | added | thobie | The backstory is that I'm designing 3-phase inverter based on IGBT-module. Target is to achieve robust PCB-level design for harsh industrial environments fulfilling CE-marking requirements regarding EMI and also from the other aspect protecting the sensitive IGBT-module from ESD/reflected wave overvoltages. Being PCB-level design, no chokes or inductors, additional filtering can be put later on between load and inverter. Was thinking about MOV in the outputs, but that's not propably good idea at all, so next was idea about Y-caps. DC-link is boost PFC from 230VAC supply -> 400VDC. | |
Feb 14, 2018 at 19:49 | comment | added | D.A.S. | Do you have a 3ph CM choke? what power levels? Ceramic is not recommended if film is a problem. How much energy is being absorbed in each pulse and what rate? (P_rms or I_rms)? Consider a snubber to dump energy in RC | |
Feb 14, 2018 at 19:38 | history | asked | thobie | CC BY-SA 3.0 |