Timeline for Help with BJT-based driver for MOSFET
Current License: CC BY-SA 3.0
25 events
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| Jul 20, 2019 at 10:05 | comment | added | jonk | @AndrewDavis \$Q_3\$ is a cascode. In simple terms, the IO pin can "pull down" on its emitter to cause it to have a collector current, which activates \$Q_1\$. Meanwhile, the IO pin also pulls down on the base of \$Q_2\$ turning it off. The opposite is when the IO pin is at \$3.3\:\text{V}\$. Then \$Q_3\$ is off and has no collector current, so \$R_4\$ pulls \$Q_1\$ off. Meanwhile, the IO pin pulls up on the base of \$Q_2\$, turning it on. | |
| Jul 20, 2019 at 8:09 | comment | added | Andrew Davis | Cool circuit, what us the purpose of Q3? is this to bias Q1 and Q2's bases wrs to eachother? | |
| Mar 11, 2018 at 22:57 | comment | added | Grig Betsan | Etched and assembled PCB by your last schematic, and I couldn't say it is successful: I burnt my STM32 chip without even powering it on ( I need to be more careful ). IDK why this happened, but I will test and measure later | |
| Mar 11, 2018 at 2:40 | comment | added | D.A.S. | using a 500kHz clock for convenience to show 50ns rise fall times tinyurl.com/yd6w6dnq but more Pd >3Wpk | |
| Mar 11, 2018 at 2:31 | comment | added | D.A.S. | use , reset> Run/stop buttons and use cursor to measure edges or Tools options to change sampling rate for more resolution tinyurl.com/ybd5fegd | |
| Mar 11, 2018 at 2:30 | comment | added | jonk | @TonyStewart.EEsince'75 Edges aren't sharp enough in my opinion. Can you stop that thing and measure the 10% to 90% on both sides? (And while I do like adding BE diodes, in this case I still don't see that the one you added does that much for the OP. I would err on keeping it simple and leaving it out.) | |
| Mar 11, 2018 at 2:26 | comment | added | D.A.S. | Looks better now, tinyurl.com/y9fmcpy3 but if you edit my source R from 100 to 25 like ARM drivers.. see the effect? | |
| Mar 11, 2018 at 2:24 | comment | added | jonk | @TonyStewart.EEsince'75 I'm shooting for hot edges; the OP wants it. The shoot-through for about \$50-100\:\text{nS}\$ probably could be tweaked better with the speed-ups. (\$C_2\$ is too big I think by a factor of 3 or so.) But the output BJTs will survive. I didn't add small emitter resistors as I don't think the OP would care. I just put the thing in Spice and include the input I/O pin source resistance and used a \$20\:\text{ns}\$ rise and fall time for the I/O and it looks decent. I think I'll lower \$C_3\$ to \$100\:\text{pF}\$ though. It's too hot. | |
| Mar 11, 2018 at 2:22 | comment | added | D.A.S. | @jonk Your latest Schema is better but still 3.3W(pk) during rise charge assuming fixed 3nF (which it isnt) tinyurl.com/y8qvnftj | |
| Mar 11, 2018 at 2:10 | comment | added | D.A.S. | Except Gate R of 10 Ohms limits the current to 1A | |
| Mar 11, 2018 at 2:03 | comment | added | D.A.S. | hFE~50 @1A with Q1 driving Ciss =3nF at Vt Ib1=10V/Rsource ~25 Ohms =400mA, so Q1 will current limit >>1A at present If if Source was 100 Ohms which usually not for 3.3Vlogic, Ib1=100mA | |
| Mar 11, 2018 at 1:56 | comment | added | jonk | @TonyStewart.EEsince'75 Are we talking about the same thing? The speed-up caps, C2 and C3, certainly impact the peak power pulses, which as I've set them will only amount to maybe \$400\:\text{nJ}\$ mean for about \$100\:\text{ns}\$ or so. A series resistor with C1 isn't going to move the power pulses in the two output BJTs much, as I see it. However, those speed-ups are a bit heavy handed I'll grant. But like I said in the post, I didn't work on them much. So I'd like to see your calculations demonstrating the problem in C1 and how a series resistor to C1 changes things. | |
| Mar 11, 2018 at 1:45 | history | edited | jonk | CC BY-SA 3.0 |
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| Mar 11, 2018 at 1:43 | comment | added | D.A.S. | C1 will dump ~1W pulse into Q1 for the duration of t so it needs a series R ~100 | |
| Mar 11, 2018 at 1:39 | history | edited | jonk | CC BY-SA 3.0 |
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| Mar 11, 2018 at 1:36 | comment | added | jonk | @TonyStewart.EEsince'75 Yes, C1 is a bit overkill. I just wanted to make sure. It could certainly be reduced some. The I/O pins already have a typical 100 Ohm or so. I was assuming that would be present. The negative going voltage on Q2's base probably won't ever cause any zenering. There just isn't enough from the I/O pin to get there. But you make a point about where I put D1. I'll just remove it from the schematic. | |
| Mar 11, 2018 at 1:02 | comment | added | D.A.S. | Also D1 serves no purpose on Q1 but is critical for Q2 due to C2 for a clamp. | |
| Mar 11, 2018 at 0:47 | comment | added | D.A.S. | C1 is a 2.2us hammer driver on the output with 1A into 10 It can be reduced to match the FET requirements and add series R 200 Ohms to PWM input to raise output Rce. Similarily C2 is 70us can be reduced to 100ns | |
| Mar 11, 2018 at 0:45 | comment | added | jonk | @MarcusMüller That reminded me to add the dead-bug wiring note to the answer, rather than leaving it in comments. Thanks! | |
| Mar 11, 2018 at 0:45 | history | edited | jonk | CC BY-SA 3.0 |
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| Mar 11, 2018 at 0:41 | comment | added | Marcus Müller | ah, that makes sense. Also, looking at what it does explains pretty nicely why dead bug style is preferable – excessive parasitic inductivity would just lead to none of the transistors ever fully switching off | |
| Mar 11, 2018 at 0:32 | comment | added | jonk | @MarcusMüller Just a little speed-up to the base of \$Q_2\$ to sharpen the falling output edge. They are tricky because they work both ways and slow down the other edge -- though the active BJT wins out anyway. This is why I said I just "cheated" on the top and bottom speed-ups. I really should have sat down and spent more time on both of them. But I didn't want to, so I didn't. But these are used to pull charge out of the BJT, since they are operated "saturated." The cap is sized just big enough to get that job done for the BJTs you choose. | |
| Mar 11, 2018 at 0:20 | comment | added | Marcus Müller | cool! Could you give me a hint what the purpose of C2-R3 is? | |
| Mar 11, 2018 at 0:14 | history | edited | jonk | CC BY-SA 3.0 |
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| Mar 11, 2018 at 0:07 | history | answered | jonk | CC BY-SA 3.0 |