Timeline for How is the truth table of a positive-edge-triggered D flip-flop constructed?
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| May 8, 2018 at 16:10 | comment | added | D.A.S. | Sorry that was a Siri translation error and should read on data sheets. Search for 74HC74 And look at the truth table. Also it is not implemented the way you suggest but rather uses transmission gates or switches with CMOS . The output Q is a result of the rising edge of clock sampling the D input. | |
| May 8, 2018 at 3:47 | answer | added | Claudio Avi Chami | timeline score: 1 | |
| May 8, 2018 at 3:21 | comment | added | Matt | I’m sorry, what? | |
| May 8, 2018 at 0:00 | comment | added | D.A.S. | Truth tables are Always and data sheets you should take a look 4013 is the CMOS D flip-flop | |
| May 7, 2018 at 21:49 | review | First posts | |||
| May 8, 2018 at 4:28 | |||||
| May 7, 2018 at 21:46 | history | asked | Matt | CC BY-SA 4.0 |