Timeline for Implementing line propagation delay compensation for BiSS master in software
Current License: CC BY-SA 4.0
37 events
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| May 15, 2018 at 15:25 | comment | added | Dorian | Anytime, it was something to learn for me to. | |
| May 15, 2018 at 15:22 | comment | added | ElectronS | I knew that SPI slave must have data in SPIbuf , and i was doing that before generating the Clock ( Output compare ) in the BISS read function. however the first time the clock is generated ( in OC initalize ) at that moment there is characters in the buffer , thats why i missed the point , So it was really tricky to know the problem. I will post an answer containing The tips and tricks if that would help . but really thank you for the patience and good help i needed to interact and challenge my self with another fellow engineer , could not have done it without YOU :)) | |
| May 15, 2018 at 15:18 | comment | added | Dorian | @ElectronS Great news !! So my morning guess was good. I was struggling with that to right now. You might put your findings in your question for others that might needed. Not the source code but at least some guidance. | |
| May 15, 2018 at 15:16 | history | bounty ended | ElectronS | ||
| May 15, 2018 at 15:16 | comment | added | ElectronS | Another problem that you might face and i have , is if you generate more clocks than required lets say 40 , this will the data received be wrong ( 2 correct words and 1 half word ) , the nextime data will arrive it will be aligend to the old half word of garbage . So after each operation i restart the SPI , to flush the RX FIFO buffer of excess data. | |
| May 15, 2018 at 15:13 | comment | added | ElectronS | Finally , i am happy to announce that it worked !!!! at full speed , the SPI slave problem was ( as i have read on Microchip forum ) could get stuck and work unreliably if it receives a clock with the SPIbuffer ( in enhanced mode ) empty , I was putting chars in the buffer , but not after initialization . So adding SPI1BUF= 0x Dummy , after OpenSPI(function) . made it work :) | |
| May 15, 2018 at 8:10 | comment | added | Dorian | @ElectronS I think I was wrong, maybe not feeding the SPI TX register raise an error that prevents further readings. Try first to feed two words then pool the SPI transfer complete for further writes. 100% a break between words is not needed, after all it's a slave. | |
| May 14, 2018 at 20:24 | comment | added | ElectronS | no i didnot try the 8 bit mode , i will continue testing , the problem is this is the first time i use the slave mode and there is some important details missing from the FRM . like (should you load dummy data to be sent , like when using Master mode) ... yes try it your self and tell me what happens | |
| May 14, 2018 at 20:11 | comment | added | Dorian | @ElectronS I will try myself tomorrow. Have you tried using 8 bit mode? | |
| May 14, 2018 at 20:00 | comment | added | ElectronS | i have spent 7 hours today working with the brilliant method you proposed after andy's Hint , however no success. I generated 10Mhz clock (using output compare ) and tied it to SPI clock and put the SPI module in Slave , however no matter how hard i tried , i am only receiving the first word . I looks like the module needs the Break ( or small pause between the sent words ) i verified this using the Buffer mode , and checking the SPI status register , i donot know if posting a snippet of the code would help , thanks anyway for the effort | |
| May 14, 2018 at 10:30 | history | edited | Dorian | CC BY-SA 4.0 |
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| May 14, 2018 at 7:34 | history | edited | Dorian | CC BY-SA 4.0 |
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| May 13, 2018 at 12:55 | history | edited | Dorian | CC BY-SA 4.0 |
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| May 12, 2018 at 23:46 | history | edited | Dorian | CC BY-SA 4.0 |
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| May 12, 2018 at 6:54 | comment | added | Dorian | @ElectronS Try to change the clock mode to. Maybe some modes don't have the delay? | |
| May 11, 2018 at 21:26 | comment | added | ElectronS | you were right , i had the buffer disabled , now when i enable it , 2 time writing to SPI1BUF works , the delay is now 150ns about 1 cycle ( i think this is intentional ) , i added another photo , showing a potential problem , since 1 data bit is in the zone where no clock edge is present , hence it will not be decoded | |
| May 11, 2018 at 18:48 | comment | added | Dorian | Still something is not right, I don't think that the 5 time writing has to do something with that , rather the timing. The fifth was at a better moment. When writing two words two words must be sent since one goes right in the shift register and one is buffered. I have a PIC24FJ available, it has the same SPI unit I will make a test on Monday. Your question is also very challenging and in my area of intrest. | |
| May 11, 2018 at 16:22 | comment | added | ElectronS | also the constant writing to the SP1BUF makes reading the of the incoming data impossible ( since it is the same register ) , my original function did the following : SP1BUF = dummy , while (!SPI1STATbits.SPIRBF) , temp1 = SPI1BUF . then repeat those 3 lines , after that temp3 = temp1<<16 + temp2 . | |
| May 11, 2018 at 16:08 | comment | added | ElectronS | bravo again , written 2 times in a row ,it doesnot send another word , since it is still sending , but when i write to spi tx 5 times in a row ( SPI1BUF = 0xFFFF ) , it worked !! the delay is reduced from 750ns to 300ns approximatly ( see the new screen shot) . but it was not completely eliminated | |
| May 11, 2018 at 15:08 | comment | added | Dorian | @ElectronS Don't use SPI functions, just write the SPI TX register twice and see what happens. You still have the break? | |
| May 11, 2018 at 14:54 | comment | added | Dorian | There is an online tool, don't have-it handy now. You're right, I should put a reference to it at least. There are more things you can try but now I'm a bit busy, Ill come back later. | |
| May 11, 2018 at 14:42 | comment | added | ElectronS | by the way how did you draw these diagrams of clock ? | |
| May 11, 2018 at 14:42 | comment | added | ElectronS | you are right it didnot, next test will be on PIC32 , just to prove the concept . in all cases thanks a lot for the well written and improved answer :) you deserve more than a silly bounty , i am keeping it open just to allow others to contribute ( only 95 views of the question so far ) | |
| May 11, 2018 at 14:38 | vote | accept | ElectronS | ||
| May 11, 2018 at 10:15 | history | edited | Dorian | CC BY-SA 4.0 |
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| May 11, 2018 at 9:41 | history | edited | Dorian | CC BY-SA 4.0 |
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| May 10, 2018 at 15:04 | comment | added | Dorian | @ElectronS Might not work with DMA because I see it uses SPI transfer done and I suppose it's related with SPI data ready that has half clock delay. You might need to write two words in the TX buffer before starting the TX DMA to have the buffer always full | |
| May 10, 2018 at 13:31 | comment | added | ElectronS | I guess thats because it supports DMA , i will try DMA now , hopefully it will eliminate the delay between Sent WORDs | |
| May 10, 2018 at 13:21 | comment | added | ElectronS | sadly DSPIC33/PIC24 doesnot support enhanced buffer mode , FRM ( SPI ) page 6 , note 1 | |
| May 10, 2018 at 11:38 | comment | added | Dorian | @ElectronS , using buffered (enhanced) SPI still keeps the break between bytes? | |
| May 10, 2018 at 7:56 | history | edited | Dorian | CC BY-SA 4.0 |
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| May 10, 2018 at 7:49 | comment | added | Dorian | I've noticed that to, I think we all assumed that the bytes are sent back to back since you were talking about shifting bytes. That's why I was asking about the code, to see if it can be improved for back to back communication | |
| May 9, 2018 at 23:02 | comment | added | ElectronS | I have added an screen shot to question ... | |
| May 9, 2018 at 22:51 | comment | added | ElectronS | After an hour of Testing , the solution you proposed worked partially ( some bits are still mistaken ) following those error i found the problem , it is in the Pause between words sent . Since i am using 16-bit archituture , and using SPI in 16bit mode ( word not byte ) and i am sending/Receiving 2 words, there is a pause of about 3 clocks between the 2 words . This delay is causing a problem with the delay compensation algorithm , NOW it appears i have figure out if i can eliminate this delay or i have to use PIC32 ( 32bit spi ) , do you have any thought ? | |
| May 9, 2018 at 21:53 | comment | added | ElectronS | what you presented is brilliant , since i am currently sampling at the falling edge , i will try changing that at the speed where it is not working and see the results , in that case , i will make a sort of calibration function that will choose the sampling polarity based on some read cycles . i will get back when i can confirm the result , thanks :) | |
| May 9, 2018 at 21:47 | comment | added | ElectronS | regarding the first sentence , the signal get to SPI in very good shape ( i confirm with Oscillscope with short GND lead ) . the Delay should be constant for a specific configuration ( speed and length ) . | |
| May 8, 2018 at 17:48 | history | answered | Dorian | CC BY-SA 4.0 |