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Timeline for SMPS and PCB layers

Current License: CC BY-SA 4.0

14 events
when toggle format what by license comment
Oct 13, 2022 at 6:50 history edited ocrdu CC BY-SA 4.0
added 3 characters in body; edited title
Oct 13, 2022 at 5:41 history edited Voltage Spike
edited tags
Oct 31, 2018 at 11:39 vote accept Johan B.
Oct 31, 2018 at 11:38 vote accept Johan B.
Oct 31, 2018 at 11:39
S Oct 25, 2018 at 19:08 history suggested Rob Gilton CC BY-SA 4.0
Replace "Gnd" with "ground", and tidy up units a bit.
Oct 25, 2018 at 17:51 comment added analogsystemsrf How slow are you willing to have the 200-volt nodes slew? That sets the Efield coupling to all the other nodes in the Switcher, on both sides of the transformer.
Oct 25, 2018 at 15:46 review Suggested edits
S Oct 25, 2018 at 19:08
Oct 25, 2018 at 15:29 answer added Voltage Spike timeline score: 1
Oct 25, 2018 at 15:20 comment added dim Pretty sure there are "ultra-low noise SMPS" with two layers. Which noise are you talking about, by the way? The conducted noise at the input? Radiated EMI noise? Conducted noise at the output?
Oct 25, 2018 at 15:13 history edited Dave Tweed CC BY-SA 4.0
fix formatting, typos
Oct 25, 2018 at 14:40 comment added winny Define ultra low noise.
Oct 25, 2018 at 14:34 comment added Rohat Kılıç Input filters and output filters play an important role on both conducted and radiated noise. Also the transformer construction highly affects the noise performance.
Oct 25, 2018 at 14:26 comment added Spehro 'speff' Pefhany I think the noise, especially common mode noise, will be dominated by non-PCB factors.
Oct 25, 2018 at 14:20 history asked Johan B. CC BY-SA 4.0