Simply the OP drives the gate of the drain follower ( with conditions \$ R_{dsOn} < R_3\$ to make \$ V_{in+}=V_{in-}\$ and \$V_{load} > 2Vt\$ , Vt= FET threshold voltage, a.k.a. \$V_{gs(th)}\$.
Then $$V_{R_2} = V_{R_3}=I_{R_3}*R_3, $$ and \$V_{R_2}\$is a ratio of \$ V_{in}\$.
Details
Typically, R3 is small like = 50 to 100mV drop t maxat Imax current or less, as the current shunt sensor to limit waste heat of Pd in R3 but not too small. where Vin offset contributes to error budget. This sensor loop area should be small as possible, so that transients do not cause overshoot for a step input from stray reactance and crosstalk from output current load mutual (inductive or capacitive) coupling.