The common mistake is to assume quadrature decoding needs some form of edge detection and counting the edges. It doesn't. You simply need to sample both states twice as often as an edge may occur.
→ Any I²C input chip will do, given the sample rate is high enough.
Do all the computation in your host CPU.
As some people need an example with reasonable numbers:
Let's assume you had four encoders, each one with one division per degree. All your axles rotate with up to 1000RPM. This is 16.67 rounds per second, which gives you 6,000 divisions per second. So you have to sample at 12,000 samples per second.
For example the MCP23008 I²C PIO chip has a continous polling mode which allows you to sample its 8 inputs in just 9 I²C clock cycles. So, to do one sample for four encoders, you need 9 clock cycles.
That means you need an I²C clock of just 108kHz to do that. Feasible? Yes. Uh, and the MCP23008 may be clocked up to 1.7MHz if you happen to need 1° accuracy at 15000RPM.