Timeline for Where would Iceo flow through and would it cause thermal runaway?
Current License: CC BY-SA 4.0
21 events
| when toggle format | what | by | license | comment | |
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| May 23, 2019 at 20:01 | history | bounty ended | CommunityBot | ||
| May 21, 2019 at 18:32 | vote | accept | pnatk | ||
| May 16, 2019 at 13:47 | vote | accept | pnatk | ||
| May 21, 2019 at 18:32 | |||||
| May 15, 2019 at 21:49 | comment | added | Voltage Spike♦ | The diagrams are not that great, they don't even show ground and only show one of the currents. | |
| May 15, 2019 at 21:47 | comment | added | pnatk | The thing is all examples about NPN is given in Common Base configuration. And in that case Icbo flows out of the base terminal against the main base current flow. In that case Icbo is leakage from collector to base. But I couldn't find a single example which shows Iceo for NPN in Common Emitter configuration. You say all Iceo in that case will flow through emitter. I thought some would flow through R2. I will try to search more about it and accept this answer in a day. Thanks. | |
| May 15, 2019 at 21:32 | comment | added | Voltage Spike♦ | All current through the NPN transistor (like the one listed above) flows through Re, I think that is where you are confused. | |
| May 15, 2019 at 21:25 | comment | added | pnatk | Ie is emitter current Iceo is the leakage current part. I hope you treat the same way. | |
| May 15, 2019 at 21:23 | comment | added | pnatk | So in both cases the entire Iceo flow through Re? | |
| May 15, 2019 at 21:15 | history | edited | Voltage Spike♦ | CC BY-SA 4.0 |
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| May 15, 2019 at 21:08 | history | edited | Voltage Spike♦ | CC BY-SA 4.0 |
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| May 15, 2019 at 21:05 | comment | added | Voltage Spike♦ | Check the bottom of my post, it should answer that portion. No portion of Iceo flows through R2 with an NPN. Normally Iceo is called Ie. I've shown the difference in the circuits with R2 there and R2 removed | |
| May 15, 2019 at 21:04 | comment | added | pnatk | Sadly still not clear because I shouldn't have asked two questions in one. Maybe I shouldn't ask about thermal runaway at all. Lets only focus on the flow path of Iceo. If there is no R2 all the Iceo would flow through emitter resistor. But if there is R2 would all the Iceo flow through R2 or Re or both? I reduced the question to this and if you can answer this it is enough for me. | |
| May 15, 2019 at 19:56 | comment | added | Voltage Spike♦ | Adding R2 would decrease the chance for thermal runaway. | |
| May 15, 2019 at 19:52 | history | edited | Voltage Spike♦ | CC BY-SA 4.0 |
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| May 15, 2019 at 19:39 | comment | added | Voltage Spike♦ | Ib comes from R1 and Ic comes from Rc, the diagram is bad because they don't show Vee or ground on the bottom side and don't show the other currents, but all currents in this diagram will flow through the resistors from top to bottom. | |
| May 15, 2019 at 19:38 | comment | added | Voltage Spike♦ | Sorry, let me clarify, this is an NPN transistor we know this because Re is connected to the emitter. This means that there are two currents that combine to find the emitter currents the equation is Ib+Ic=Ie (which I assume what I call Ie is what you cal Iceo). Iceo goes through Re | |
| May 15, 2019 at 19:19 | comment | added | pnatk | Please also include where will the Iceo flow through or will it divide between R1 and Re. I cannot find a single source in internet addresses this. | |
| May 15, 2019 at 19:18 | history | edited | Voltage Spike♦ | CC BY-SA 4.0 |
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| May 15, 2019 at 19:17 | history | edited | Voltage Spike♦ | CC BY-SA 4.0 |
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| May 15, 2019 at 19:10 | history | edited | Voltage Spike♦ | CC BY-SA 4.0 |
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| May 15, 2019 at 19:05 | history | answered | Voltage Spike♦ | CC BY-SA 4.0 |