Yes it's Bi-Phase (Mark, Space or Invert) aka Manchester code which has this typical 1T,2T pattern with a preamble of 1T for clock freq and phase sync. The jitter tolerance depends on quality of clock stability and sampling or integration method.

FSK alternates f1,f2 for many cycles and the ratio of Δf/fbr (bitrate) gives a deviation ratio that improves conversion from SNR above CNR.

Microchip implementation

Yes it's Bi-Phase (Mark, Space or Invert) aka Manchester code which has this typical 1T,2T pattern with a preamble of 1T for clock freq and phase sync, where T= 1/2 bit. The jitter tolerance depends on quality of clock stability and sampling or integration method.

FSK alternates f1,f2 for many cycles and the ratio of Δf/fbr (bitrate) gives a deviation ratio that improves conversion from SNR above CNR.

Microchip implementation

It certainly looks like "Manchester code"

This can be decoded with a 1.5T One-shot ( = 3/4 clock cycle time) and D FF and XOR gate IC on a breadboard or in software. I made my 1st one in '76.

Yes it's Bi-Phase (Mark, Space or Invert) aka Manchester code which has this typical 1T,2T pattern with a preamble of 1T for clock freq and phase sync. The jitter tolerance depends on quality of clock stability and sampling or integration method.

FSK alternates f1,f2 for many cycles and the ratio of Δf/fbr (bitrate) gives a deviation ratio that improves conversion from SNR above CNR.

Yes it's Bi-Phase (Mark, Space or Invert) aka Manchester code which has this typical 1T,2T pattern with a preamble of 1T for clock freq and phase sync. The jitter tolerance depends on quality of clock stability and sampling or integration method.

FSK alternates f1,f2 for many cycles and the ratio of Δf/fbr (bitrate) gives a deviation ratio that improves conversion from SNR above CNR.

Microchip implementation