Timeline for USB-C Connector: How to route signals
Current License: CC BY-SA 4.0
10 events
when toggle format | what | by | license | comment | |
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Jun 11, 2019 at 10:42 | answer | added | DerStrom8 | timeline score: 2 | |
Jun 10, 2019 at 23:03 | comment | added | Ale..chenski | Unfortunately it is true that Type-C connector is not for a breadboard-kind DIY technology. .. :-( | |
Jun 10, 2019 at 21:00 | history | tweeted | twitter.com/StackElectronix/status/1138189307607441409 | ||
Jun 10, 2019 at 20:37 | comment | added | VanGo | digikey.ca/product-detail/en/amphenol-icc-commercial-products/… is almost exactly identical footprint, but no mention of pattern restricted area. | |
Jun 10, 2019 at 20:23 | comment | added | VanGo | @EE_socal I saw this but it seems that the spacing of their A/B row is alot bigger - I think the best option will be to look for a connector that has greater A/B row spacing. | |
Jun 10, 2019 at 19:34 | comment | added | EE_socal | Maybe this will help: e2e.ti.com/support/interface/f/138/t/… | |
Jun 10, 2019 at 18:46 | answer | added | Jim Fischer | timeline score: 3 | |
Jun 10, 2019 at 18:39 | comment | added | Cursorkeys | You could also break out through A1-12. I make that 0.35mm pad-pad spacing, so a 0.1mm trace will fit though and still conform to IPC spacings at USB voltages. 0.1mm traces with ~0.1mm clearance are expensive too though. Not really a lot of good options here as far as I can see. I'd probably contact Molex myself and request advice, absent advice then active-pad seems the best idea to me | |
Jun 10, 2019 at 17:36 | comment | added | Cursorkeys | That is my understanding of 'pattern restricted area', no copper at all. I wouldn't consider soldermask covered vias acceptable, as soldermask should not ever be relied on for electrical insulation IMHO. You can certainly do vias that will fit (my current fab can do down to 0.3mm), but the cost of the board will go up. The other option is via-in-pad/active-pad. | |
Jun 10, 2019 at 17:18 | history | asked | VanGo | CC BY-SA 4.0 |