Timeline for What's an idiomatic way to detect posedges inside a FSM in Verilog?
Current License: CC BY-SA 4.0
3 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Nov 25, 2019 at 19:29 | comment | added | Dave Tweed | If it IS important to react to every incoming edge, you may want something called a "counting semaphore". I can add that to my answer if you need it. | |
| Nov 25, 2019 at 18:33 | comment | added | David Given | I had completely not thought of doing that! That's a big improvement, thanks. | |
| Nov 25, 2019 at 1:13 | history | answered | Dave Tweed | CC BY-SA 4.0 |