Timeline for Hardware/software needed to decode Differential Manchester?
Current License: CC BY-SA 4.0
13 events
| when toggle format | what | by | license | comment | |
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| Jan 11, 2021 at 16:13 | history | protected | CommunityBot | ||
| Jan 10, 2021 at 11:40 | comment | added | Michael Lätzsch | I have just found this HD9P6409-9 (Renesas) device. Guess this is doing exactly what you want. Haven’t tested this IC yet but will do soon. I am just curious what your application is. Sounds to me like a remote control protocol conversion for broadcast cameras. | |
| Feb 14, 2020 at 11:25 | comment | added | D.A.S. | It’s a delay timer to sample Biphase and convert to NRZ | |
| Feb 14, 2020 at 11:16 | comment | added | D.A.S. | Did I not say 3/4T?, T is the bit period | |
| Feb 14, 2020 at 5:12 | comment | added | Navin | @TonyStewartSunnyskyguyEE75 What exactly is "3/4 one shot"? I'm having a hard time googling that. | |
| Jan 17, 2020 at 19:10 | history | edited | David Sindar | CC BY-SA 4.0 |
added 121 characters in body
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| Jan 17, 2020 at 13:36 | comment | added | Peter Smith | Apart from the other suggestions, you could get a CPLD evaluation board where it should be pretty simple to make it operate as a translator. (I found one that costs £12:50 for a single unit based on the XC9572). | |
| S Jan 17, 2020 at 12:49 | history | suggested | VillageTech |
Added 'manchester-coding' tag.
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| Jan 17, 2020 at 0:36 | review | Suggested edits | |||
| S Jan 17, 2020 at 12:49 | |||||
| Jan 16, 2020 at 22:39 | comment | added | D.A.S. | You can use a 16x clock and sync edges to mid-bit edge only @ 1MHz or use non-retriggerable 1 shot of 3/4T = 12.0 us and make recovered clock from data. then test with PRSG what kind of performance do you need? define max jitter and BER | |
| Jan 16, 2020 at 21:52 | answer | added | Marcus Müller | timeline score: 1 | |
| Jan 16, 2020 at 21:16 | answer | added | Justme | timeline score: 3 | |
| Jan 16, 2020 at 21:08 | history | asked | David Sindar | CC BY-SA 4.0 |