(I hope you meant to place it vice versa to the placement surface of the IC.)

The voltage on the pins of the decoupling capacitor is the same as on the VCC/GND of your semiconductors. So the "risk" is not really there. Rather placing it close to the pins is fine - and having short but wider circuit wires towards it very fine! (Only when having very big copper surfaces then this will have bad impact on hand soldering processes as that's a thermal sink either. Doing the pads in a mushroom shape can help preventing this.)

It surely depends on what the vendor of your semiconductor has written in the data sheet. Sometimes they have "keep free" areas, e.g. close to high-sensitive ADC parts in the chip or in the area where oscillators are driven.

For simple logic i would say, its not a problem. in classical boards i have seen DIP sockets with capacitors built in, and also seen wired capacitors hand soldered directly on the backside solder points of the IC.

(I hope you meant to place it vice versa to the placement surface of the IC.)

The voltage on the pins of the decoupling capacitor is the same as on the VCC/GND of your semiconductors. So the "risk" is not really there. Rather placing it close to the pins is fine - and having short but wider circuit wires towards it very fine! (Only when having very big copper surfaces then this will have bad impact on hand soldering processes as that's a thermal sink. Doing the pads in a mushroom shape can help prevent this.)

It also depends on what the vendor of your semiconductor has written in the data sheet. Sometimes they have "keep free" areas, e.g. close to highly sensitive ADC parts in the chip or in the area where oscillators are driven.

For simple logic I would say, its not a problem. In classical boards I have seen DIP sockets with capacitors built in, and also seen wired capacitors hand soldered directly on the backside solder points of the IC.

(i hope you meant to place it vice versa to the placement surface of the IC.)

the voltage on the pins of the decoupling capacitor is the same as on the VCC/GND of your semiconductors. so the "risk" is not really there. rather placing it close to the pins is fine - and having short but wider circuit wires towards it very fine! (only when having very big copper surfaces then this will have bad impact on hand soldering processes as that's a thermal sink either. doing the pads in a mushroom shape can help preventing this.)

it surely depends on what the vendor of your semiconductor has written in the data sheet. sometimes they have "keep free" areas, e.g. close to high-sensitive ADC parts in the chip.

for simple logic i would say, its not a problem. in classical boards i have seen DIP sockets with capacitors built in, and also seen wired capacitors hand soldered directly on the backside solder points of the IC.

(I hope you meant to place it vice versa to the placement surface of the IC.)

The voltage on the pins of the decoupling capacitor is the same as on the VCC/GND of your semiconductors. So the "risk" is not really there. Rather placing it close to the pins is fine - and having short but wider circuit wires towards it very fine! (Only when having very big copper surfaces then this will have bad impact on hand soldering processes as that's a thermal sink either. Doing the pads in a mushroom shape can help preventing this.)

It surely depends on what the vendor of your semiconductor has written in the data sheet. Sometimes they have "keep free" areas, e.g. close to high-sensitive ADC parts in the chip or in the area where oscillators are driven.

For simple logic i would say, its not a problem. in classical boards i have seen DIP sockets with capacitors built in, and also seen wired capacitors hand soldered directly on the backside solder points of the IC.