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IC1 and its associated components are just a switch debouncer. C2 & R2 trigger IC2 on the falling (trailing) edge of the pulse coming from IC1. IC3a (a positive edge triggered D-Type flip flop) holds IC2 either in reset or enable dependent upon the circuit's output state at the time of the rising (leading) edge of the pulse coming from IC1. A transistor is used to drive the LED to ensure that IC3a's D input sees a sufficiently high logic 1 level voltage. If the circuit triggers at powerup and this is a problem then add a power-on-reset circuit to the asynchronous set pin (S) of IC3a.

IC1 and its associated components are just a switch debouncer. C2 & R2 trigger IC2 on the falling (trailing) edge of the pulse coming from IC1. IC3a (a positive edge triggered D-Type flip flop) holds IC2 either in reset or enable dependent upon the circuit's output state at the time of the rising (leading) edge of the pulse coming from IC1. A transistor is used to drive the LED to ensure that IC3a's D input sees a sufficiently high logic 1 level voltage. In this edit I have added a power-on-reset circuit to the asynchronous set pin (S) of IC3a.

I have built and tested the circuit, it works well.

IC1 and its associated components are just a switch debouncer. C2 & R2 trigger IC2 on the falling (trailing) edge of the pulse coming from IC1. IC3a (a positive edge triggered D-Type flip flop) holds IC2 either in reset or enable dependent upon the circuit's output state at the time of the rising edge of the pulse coming from IC1. A transistor is used to drive the LED to ensure that IC3a's D input sees a sufficiently high logic 1 level voltage. If the circuit triggers at powerup and this is a problem then add a power-on-reset circuit to the asynchronous set pin (S) of IC3a.

IC1 and its associated components are just a switch debouncer. C2 & R2 trigger IC2 on the falling (trailing) edge of the pulse coming from IC1. IC3a (a positive edge triggered D-Type flip flop) holds IC2 either in reset or enable dependent upon the circuit's output state at the time of the rising (leading) edge of the pulse coming from IC1. A transistor is used to drive the LED to ensure that IC3a's D input sees a sufficiently high logic 1 level voltage. If the circuit triggers at powerup and this is a problem then add a power-on-reset circuit to the asynchronous set pin (S) of IC3a.

IC1 and its associated components are just a switch debouncer. C2 & R2 trigger IC2 on the falling (trailing) edge of the pulse coming from IC1. IC3a (a positive edge triggered D-Type flip flop) holds IC2 either in reset or enable dependent upon the circuit's output state at the time of the rising edge of the pulse coming from IC1. A transistor is used to drive the LED to ensure that IC3a's D input sees a sufficiently high logic 1 level voltage. If the circuit triggers at powerup and this is a problem then add a power-on-reset circuit to the reset pin of IC1.

IC1 and its associated components are just a switch debouncer. C2 & R2 trigger IC2 on the falling (trailing) edge of the pulse coming from IC1. IC3a (a positive edge triggered D-Type flip flop) holds IC2 either in reset or enable dependent upon the circuit's output state at the time of the rising edge of the pulse coming from IC1. A transistor is used to drive the LED to ensure that IC3a's D input sees a sufficiently high logic 1 level voltage. If the circuit triggers at powerup and this is a problem then add a power-on-reset circuit to the asynchronous set pin (S) of IC3a.