Timeline for How can one label a node with more than one name in SPICE/ LTspice
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10 events
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| Jan 16, 2013 at 20:31 | comment | added | MartyMacGyver | See the update I added. Looks like aliases (synonyms) do in fact work normally in simple circuits (that is, if a node is labeled VCC and VDD only one will remain in the netlist (e.g., VCC), but other references to VCC and VDD will also be resolved in the same way as well (e.g., to VCC as well). That's exactly what I wanted to happen... but why it's not happening in the subcircuits and/or models I'm using is not yet clear. | |
| Jan 15, 2013 at 6:16 | comment | added | MartyMacGyver | It's not just semantics though. One is simply a node with two names. The other is a multiplicity of extra null components (though specifically NOT jumpers) added as a hack to create extra names for the same node. One is so simple I figured I just missed some directive that does this. The other is not obvious. In fact, given the raft of answers here including my own I will have to conclude that a simple node alias that doesn't require hacks, workarounds or other virtual complexity is in fact impossible in SPICE. Which was my original question. | |
| Jan 15, 2013 at 3:51 | comment | added | The Photon | How would your results be any different for the case of "one node with two names" compared to "two nodes that always have exactly the same potential"? It's a semantic difference that won't affect your simulation result at all. So what problem are you trying to solve by the distinction you're making? | |
| Jan 15, 2013 at 3:25 | comment | added | MartyMacGyver | By an alias I mean being able to give one specific node two different names. They're just labels after all... internal node x = FOO = BAR ought to be reasonable (it certainly is mathematically... X=Y=1 or such, without needing some intermediate f(x) = x function to translate between them.) | |
| Jan 14, 2013 at 22:50 | comment | added | The Photon | What do you mean by aliases. Two nodes that are absolutely always at the same potential are as good as aliases, aren't they? And it will work just as well for any kind of node --- the voltage source in SPICE is a totally ideal mathematical object that sets the potential difference between two nodes. | |
| Jan 14, 2013 at 22:21 | comment | added | MartyMacGyver | Also, this works in a particular case (power supply aliases)... but what about general aliases? What if I'm using a logic output to feed CLKin and FOOin? (That's a contrived example but if a given model restricts my options with regard to node naming, would the 0V power source idea work better than a very tiny resistance - which is sightly more realistic anyway?) | |
| Jan 14, 2013 at 22:18 | comment | added | MartyMacGyver | I'm waiting to see if aliases are at all possible. What are the possible side-effects? What if I'm modeling a noisy base power supply - will this extra source introduce anything usual? Adding a source seems like it'd be more complex than a trivially tiny resistor as I originally noted but perhaps not... | |
| Jan 14, 2013 at 22:14 | comment | added | The Photon | Did you try the 0-V source? It should not collapse the nodes like it did with the jumper, because another reason to do this is to be able to measure the current through the source, which wouldn't work if the two nodes were combined. | |
| Jan 14, 2013 at 22:00 | comment | added | MartyMacGyver | Good point though tangential to the question - if you have any sources for better IC models please reply here. What I'm currently using is from the [tech.groups.yahoo.com/group/LTspice/](LTspice Yahoo! group). They do the job well but I definitely see your point about being able to model the individual IC power inputs. In THIS case I am more interested in modeling semi-ideal circuits as I do the logic work so what I have is working, except the alias thing (which apparently isn't do-able without adding extra components). | |
| Jan 14, 2013 at 21:47 | history | answered | The Photon | CC BY-SA 3.0 |