Timeline for Ringing problem Bootstrap for high side mosfet driver
Current License: CC BY-SA 4.0
8 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Apr 29, 2021 at 20:58 | comment | added | John Birckhead | All of the traces should be kept short in this area and somewhat wider than usual. You are switching at high frequencies so you will have high instantaneous currents. Check out mouser.com/datasheet/2/368/UG186-888036.pdf and see how they lay it out with planes and traces. They also have waveforms that are more like what you are expecting. | |
| Apr 29, 2021 at 20:42 | comment | added | Minglu | Thank you very much John, I get your points. you mentioned wide traces, do you mean the trace from HV_48V to Drain of Q1, and from source of Q2 to drain of Q3 and from source Q3 to HV_GND? I added part of my layour, in my opinion, the problem should be the trace from HV_48V to Q2, am I right? | |
| Apr 29, 2021 at 18:56 | comment | added | fifi_22 | Is it a real problem with a circuit or just scope measurement issue? | |
| Apr 29, 2021 at 18:48 | comment | added | John Birckhead | Good resource! Note that this is for low frequency inductance. Switching just happens so darn fast these days. | |
| Apr 29, 2021 at 18:42 | comment | added | Marko Buršič | +1 Looking this spok.ca/index.php/resources/tools/106-traceindcalc it seems that a trace has to be as close to the ground plane and as wide as possible, but then a compromise should be taken, because the capacitance grows with inverse. | |
| Apr 29, 2021 at 18:35 | comment | added | John Birckhead | The traces must be wide to handle the high instantaneous currents and high frequencies. Think about skin effect and you'll see what I mean. I should also have said to avoid parallel traces on adjacent layers, which can make a capacitor. | |
| Apr 29, 2021 at 18:30 | comment | added | Marko Buršič | Doesn't the wide trace have more inductance than narrow? | |
| Apr 29, 2021 at 18:28 | history | answered | John Birckhead | CC BY-SA 4.0 |