Timeline for How do I make an edge triggered T flip flop using integrated injection logic (I2L)?
Current License: CC BY-SA 4.0
5 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| May 7, 2021 at 16:18 | vote | accept | DeadSlayer | ||
| May 7, 2021 at 16:18 | |||||
| May 5, 2021 at 11:35 | comment | added | DeadSlayer | 404 mA, which will probably burn it | |
| May 5, 2021 at 11:12 | comment | added | Math Keeps Me Busy | Per my answer, you cannot connect the emitter of a PNP transistor to +5V and the base to ground. That will burn out the transistor. I am referring specifically to Q3 and Q4 in your schematic. Your simulator may not complain, real transistors will. Check the base current in those transistors with your simulator. | |
| May 5, 2021 at 8:51 | comment | added | DeadSlayer | Maybe I can decrease the vcc ? | |
| May 5, 2021 at 8:36 | history | answered | DeadSlayer | CC BY-SA 4.0 |