Timeline for Do more logic gates in series mean more slowing of the output result?
Current License: CC BY-SA 4.0
3 events
| when toggle format | what | by | license | comment | |
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| Feb 5, 2023 at 21:43 | comment | added | Lorenzo Marcantonio | I really doubt Intel would be happy to let you know how they do the silicon layout or their technology library… wikipedia has some more info about the topic en.wikipedia.org/wiki/Standard_cell | |
| Feb 5, 2023 at 4:27 | comment | added | Prashant Pugalia | Can you give some examples of process specific primitives. Like what does an x86 cpu use ? | |
| Jul 28, 2021 at 8:14 | history | answered | Lorenzo Marcantonio | CC BY-SA 4.0 |