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Aug 22, 2021 at 7:02 comment added michi7x7 @AndreyRogatkin There are some DSPs with instruction sets like that (C6713 e.g.), but I don't know if that still counts as "modern". There are also several SoCs that have built in FPGA-cores which would allow you to implement the time-stamping (to FPGA-clock precision) yourself
Aug 20, 2021 at 18:13 comment added Joshua I have a CPU on my shelf for an abandoned embedded project that provides by specification fixed cycle execution. Unfortunately it provides zero ISRs so it doesn't answer OP's question. You must poll all IO. But it's got 8 cores so you should be able to do this.
Aug 20, 2021 at 8:56 comment added Lundin @AndreyRogatkin I think on most modern cores it depends on what instruction you are currently executing when the interrupt hits. You'd rather be looking at older, simpler cores I think. But again, you are looking for a solution hoping that it will fix your problem, rather than to focus on fixing the actual problem.
Aug 20, 2021 at 8:40 comment added tlfong01 A two core mcu, such as the Pi Pico, might solve your problem: How to use the two Cores of the Pi Pico? And how fast are Interrupts? - Andreas Spiess, 71,479 views, 2021feb21 (Two thread/core at 5:03, Interrupt at 8:04, frequency counter at 8:54, PIO fast counter at 11:04) youtube.com/watch?v=9vvobRfFOwk.
Aug 20, 2021 at 8:37 comment added Andrey Rogatkin Thanks! I think you are right. But the question may be interesting for other purposes. Can you please mention modern processors with instruction sets which have fixed amount of cycles?
Aug 20, 2021 at 8:21 history answered Lundin CC BY-SA 4.0