Timeline for Minimalistic TCP/IP implementation on FPGA
Current License: CC BY-SA 4.0
13 events
| when toggle format | what | by | license | comment | |
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| Sep 14, 2021 at 22:06 | comment | added | johnnymopo | Another thought is udp with redundancy | |
| Sep 8, 2021 at 15:29 | comment | added | kalyanswaroop | Another option that maybe lighter weight is to go with some other point-point framing protocol like ppp/HDLC/SDLC, etc to the PC and then from the PC, you can do TCP. But you'll need to have hardware in the PC then. Atleast a USB serial adapter of some sort. Will work if you dont need very high bandwidth. | |
| Sep 7, 2021 at 18:27 | comment | added | hotpaw2 | There's an verilog implementation of a bidirectional UDP stack for an EP4CE22 FPGA in the GitHub repo for the Hermes Lite 2 SDR. It's mostly a bunch of state machines. github.com/softerhardware/Hermes-Lite2/tree/master/gateware | |
| Sep 7, 2021 at 18:09 | answer | added | Holminge | timeline score: 2 | |
| Sep 7, 2021 at 16:25 | comment | added | Criticizing Israel not allowed | Instead of TCP, you might want to build your own protocol on top of UDP. You can add an acknowledgement/retry system to the protocol and it can be simpler than TCP. | |
| Sep 6, 2021 at 18:33 | comment | added | Mitu Raj | You won't even easily find a standardized IP Core of TCP/IP stack cz nobody does that. | |
| Sep 6, 2021 at 16:49 | comment | added | jay | Welcome to the site. My personal opinion: It is possible, but I would try something else, more efficient architecture. First problem I see is not only the client, but the server side will need 5x (for 5 clients) faster front end + super fast processor. Quote from the material: 1) we designed a simplified and unidirectional version of the protocol. 2) For protocol verification and testing we developed an emulator. 3)Testbed configuration for congestion control verification. The five sender PCs are running the simplified TCP emulator, the receiver PC is running standard Linux TCP/IP stack. | |
| Sep 6, 2021 at 15:41 | answer | added | TimWescott | timeline score: 7 | |
| Sep 6, 2021 at 15:31 | history | edited | w4tchd0g | CC BY-SA 4.0 |
added 3 characters in body
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| Sep 6, 2021 at 15:31 | comment | added | Voltage Spike♦ | Usually the tcp stack is still implemented software, with a microprocessor in the fpga. Find a dev board with Ethernet on it | |
| Sep 6, 2021 at 15:30 | comment | added | TypeIA | TCP necessarily involves bidirectional communication, even if only one end sends payload. | |
| S Sep 6, 2021 at 15:09 | review | First questions | |||
| Sep 6, 2021 at 16:12 | |||||
| S Sep 6, 2021 at 15:09 | history | asked | w4tchd0g | CC BY-SA 4.0 |