Timeline for Is it possible to leave certain pins of an m.2 slot not connected to their PCIe lanes on a processor?
Current License: CC BY-SA 4.0
10 events
| when toggle format | what | by | license | comment | |
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| Sep 22, 2021 at 10:13 | vote | accept | surfinride | ||
| Sep 22, 2021 at 5:12 | vote | accept | surfinride | ||
| Sep 22, 2021 at 10:13 | |||||
| Sep 20, 2021 at 7:11 | comment | added | surfinride | @hacktastical Thanks for the response. The SOM has a single PCIe controller and doesn't support Lane Bifurcation or Lane Swapping. Only one endpoint device can be connected to it. I will explore the switch option to see whether its viable. Also, I see that some PCIe m.2 modules offer various interfaces such as I2C and USB. In these cases is the module still considered an endpoint device? Or does it make use of the mentioned USB or I2C interface exclusively. | |
| Sep 17, 2021 at 18:04 | history | edited | hacktastical | CC BY-SA 4.0 |
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| Sep 17, 2021 at 17:48 | history | edited | hacktastical | CC BY-SA 4.0 |
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| Sep 17, 2021 at 17:23 | comment | added | hacktastical | If it’s a SODIMM module, it’s very unlikely (that is, I don’t know of one) that the SoC on it will support those features (reversal, etc.) like you might find on, say, a Broadcom switch. But a 2-lane endpoint will work on host lanes 0 and 1. | |
| Sep 17, 2021 at 16:27 | comment | added | Tom Carpenter | For point (2), if connecting two lanes, use lanes 0 and 1. If host supports lane reversal, you can also use just lane 3, or lanes 3 and 2 (theoretically if either device supports it, but of course no guarantee on what is getting plugged in). | |
| Sep 17, 2021 at 16:24 | history | edited | hacktastical | CC BY-SA 4.0 |
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| Sep 17, 2021 at 16:18 | history | edited | hacktastical | CC BY-SA 4.0 |
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| Sep 17, 2021 at 16:12 | history | answered | hacktastical | CC BY-SA 4.0 |