Timeline for Instrumentation Amplifier with a gain of 1 doesn't output a different signal
Current License: CC BY-SA 4.0
12 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Oct 5, 2021 at 23:10 | vote | accept | Sam Shurp | ||
| Sep 23, 2021 at 0:03 | vote | accept | Sam Shurp | ||
| Oct 5, 2021 at 23:10 | |||||
| Sep 22, 2021 at 21:22 | comment | added | Sam Shurp | how does voltage gain play role in here? | |
| Sep 22, 2021 at 16:53 | comment | added | Sam Shurp | what are your thoughts on this. It is not that complicated, and seems to work for any voltage range input. I would like to know what you think of this: ti.com/lit/ds/symlink/… | |
| Sep 22, 2021 at 4:27 | comment | added | Sam Shurp | You are amazing. Thank you for answering. | |
| Sep 22, 2021 at 4:25 | comment | added | Simon Fitch | @SamShurp Yes, "common mode voltage" in these graphs (Y-axis) refers to the input. I've added a lot to my answer to address how to read those graphs, and some other considerations. | |
| Sep 22, 2021 at 4:19 | comment | added | Sam Shurp | Just want to be sure, is the common mode voltage the input? Does that mean that both the positive and negative input have to be above 1.2V at Vref of 0V to work? | |
| Sep 22, 2021 at 4:11 | history | edited | Simon Fitch | CC BY-SA 4.0 |
Precision reference for Vref
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| Sep 22, 2021 at 4:03 | history | edited | Simon Fitch | CC BY-SA 4.0 |
Reason for input contraints
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| Sep 22, 2021 at 3:57 | history | edited | Simon Fitch | CC BY-SA 4.0 |
Be careful of equal inputs with single ended supply
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| Sep 22, 2021 at 3:51 | history | edited | Simon Fitch | CC BY-SA 4.0 |
How to read the graph
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| Sep 22, 2021 at 3:00 | history | answered | Simon Fitch | CC BY-SA 4.0 |