Timeline for Digital logic/sequential circuit to produce one pulse for every 5 clock pulses
Current License: CC BY-SA 4.0
19 events
| when toggle format | what | by | license | comment | |
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| Jun 27, 2023 at 23:04 | history | bumped | CommunityBot | This question has answers that may be good or bad; the system has marked it active so that they can be reviewed. | |
| Feb 27, 2023 at 12:00 | history | bumped | CommunityBot | This question has answers that may be good or bad; the system has marked it active so that they can be reviewed. | |
| Oct 23, 2022 at 1:02 | history | bumped | CommunityBot | This question has answers that may be good or bad; the system has marked it active so that they can be reviewed. | |
| Jun 21, 2022 at 11:03 | history | bumped | CommunityBot | This question has answers that may be good or bad; the system has marked it active so that they can be reviewed. | |
| Jan 11, 2022 at 14:12 | answer | added | AnalogKid | timeline score: 1 | |
| Jan 11, 2022 at 13:19 | answer | added | Borg Drone | timeline score: 1 | |
| Oct 28, 2021 at 6:53 | comment | added | Syed | "Am I missing something": You are missing the reset signal. | |
| Oct 27, 2021 at 20:41 | comment | added | user208862 | Now I see you want pulse high when A is high only so you must add one AND gate. (Y = A AND Q4). | |
| Oct 27, 2021 at 18:50 | comment | added | Ali Na | @jsotola true, I see it won't work | |
| Oct 27, 2021 at 18:48 | comment | added | Ali Na | @Syed but I want the output pulse to have the same width as the input pulse--it seems like a divide-by-5 solution will result in a much wider pulse. Am I missing something? | |
| Oct 27, 2021 at 17:10 | comment | added | user208862 | You can do it with one 4017 (Johnson Counter) and nothing else because you have single pin for every count so Output 4 gives you desired pulse then do the reset. | |
| Oct 27, 2021 at 17:10 | comment | added | Syed | petervis.com/dictionary-of-digital-terms/… | |
| Oct 27, 2021 at 16:28 | comment | added | Dave Tweed | There are plenty of free simulators. For example, Logisim seems to work well. | |
| Oct 27, 2021 at 16:09 | comment | added | Peter Smith | Look for 'finite state machines using JK flip flops'. From a quick look, I can make a synchronous solution using 3 JK devices and 2 2-input AND gates. | |
| Oct 27, 2021 at 16:04 | comment | added | jay | With asynchronous counter, the combination of Q-s will see glitch due to the propagation delay. | |
| Oct 27, 2021 at 15:49 | comment | added | Peter Smith | You will need to reset the counter; using JK flip flops can make this much simpler. | |
| Oct 27, 2021 at 15:48 | comment | added | jsotola | draw the timing diagram to the second output pulse | |
| S Oct 27, 2021 at 15:40 | review | First questions | |||
| Oct 27, 2021 at 16:04 | |||||
| S Oct 27, 2021 at 15:40 | history | asked | Ali Na | CC BY-SA 4.0 |