Timeline for does a 2-flip-flop synchronizer for clock domain crossing need a clear (reset) input signal?
Current License: CC BY-SA 4.0
6 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Nov 3, 2021 at 14:55 | vote | accept | nanoeng | ||
| Nov 3, 2021 at 7:12 | comment | added | Mitu Raj | Not necessary, but harmless if you have reset in 2FF synchronizer | |
| Nov 3, 2021 at 1:52 | answer | added | Kevin White | timeline score: 2 | |
| Nov 3, 2021 at 1:48 | review | Close votes | |||
| Nov 17, 2021 at 3:07 | |||||
| S Nov 3, 2021 at 1:25 | review | First questions | |||
| Nov 3, 2021 at 1:29 | |||||
| S Nov 3, 2021 at 1:25 | history | asked | nanoeng | CC BY-SA 4.0 |