Timeline for How do the dimensions of a MOS tranistor affect the gain of a CMOS inverter?
Current License: CC BY-SA 4.0
9 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Dec 9, 2021 at 6:32 | vote | accept | Sparsh | ||
| Dec 9, 2021 at 6:32 | |||||
| Dec 5, 2021 at 18:38 | answer | added | jp314 | timeline score: 3 | |
| Dec 5, 2021 at 13:41 | review | Close votes | |||
| Dec 9, 2021 at 0:31 | |||||
| Dec 5, 2021 at 13:23 | comment | added | Elliot Alderson | What do you understand about how changing the channel length and width changes the drain current? What happens if you change them such that the ratios of W:L and Wp:Wn are different? If you are not sure, ask your instructor. We won't do you homework for you. | |
| Dec 5, 2021 at 12:09 | comment | added | Bimpelrekkie | What is "gain"? Can it be read from that DC transfer curve you include? (yes it can, how?) | |
| Dec 5, 2021 at 8:48 | history | edited | ocrdu | CC BY-SA 4.0 |
added 76 characters in body; edited title
|
| Dec 5, 2021 at 7:53 | history | edited | Sparsh | CC BY-SA 4.0 |
added 6 characters in body
|
| S Dec 5, 2021 at 7:47 | review | First questions | |||
| Dec 5, 2021 at 8:48 | |||||
| S Dec 5, 2021 at 7:47 | history | asked | Sparsh | CC BY-SA 4.0 |