Timeline for Re model for Collector feedback bias with emitter resistance
Current License: CC BY-SA 4.0
15 events
when toggle format | what | by | license | comment | |
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Mar 10, 2022 at 14:53 | comment | added | D.A.S. | This design makes no sense to use regardless of how you analyze it. Normally the goals are to balance the Vc output for large signal or high symmetry current swings or low Vbe modulation or low THD or large swing output or high impedance input , or tolerant to high source impedance or at least an output impedance the same or lower than the source or at least have some design goals incl. BW or tr or ft toggle rate. Which of these are demonstrated here? none? The title should be what's wrong with this NPN CE design? and sent back to author. | |
Mar 6, 2022 at 19:05 | review | Close votes | |||
Mar 12, 2022 at 3:02 | |||||
Mar 6, 2022 at 18:51 | comment | added | D.A.S. | Is it a problem we allow illogically biased designs to be analyzed that have no AC negative feedback yet allow the OP to accept an answer with NFB from a true voltage source that shunts all AC negative feedback(NFB) and only allows poor DC NFB with an almost saturated collector voltage, poor input impedance , low gain and high offset DC output. I voted to close yet answered by changing the question with Rs=50 and Re=0, which IS an acceptable design. | |
Mar 6, 2022 at 18:48 | comment | added | D.A.S. | Does this answer your question? Negative feedback - equilibrium No yet that's what you accepted. There is no AC NFB | |
Mar 6, 2022 at 0:00 | history | tweeted | twitter.com/StackElectronix/status/1500259954216820742 | ||
Mar 5, 2022 at 21:39 | history | became hot network question | |||
Mar 5, 2022 at 19:27 | answer | added | jonk | timeline score: 4 | |
Mar 5, 2022 at 19:15 | vote | accept | Equation_Charmer | ||
Mar 5, 2022 at 9:25 | answer | added | LvW | timeline score: 3 | |
Mar 5, 2022 at 7:17 | answer | added | D.A.S. | timeline score: 5 | |
Mar 5, 2022 at 7:15 | history | edited | G36 | CC BY-SA 4.0 |
added 103 characters in body
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Mar 5, 2022 at 6:28 | history | edited | G36 | CC BY-SA 4.0 |
added 28 characters in body
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Mar 5, 2022 at 6:17 | comment | added | across | I think you must assume the load resistor is infinity, so \$i_o = 0\$, then you can work the voltage gain easily. Voltage gain depends on load resistor here so you will get a messy expression if you include it | |
S Mar 5, 2022 at 5:54 | review | First questions | |||
Mar 5, 2022 at 7:26 | |||||
S Mar 5, 2022 at 5:54 | history | asked | Equation_Charmer | CC BY-SA 4.0 |