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Timeline for Implementing three-state logic

Current License: CC BY-SA 4.0

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Jan 12, 2023 at 20:50 comment added davidcary @SteveSh: do you have any more information about these 3 logic levels used in PROMs? It sounds related but not exactly the same as the 3 transistor sizes used to produce 4 voltage levels used in the 8087 microcode ROM in "high-density ROM in Intel's 8087 floating point chip".
Oct 26, 2022 at 7:57 comment added Rd Basha See comments above
Oct 26, 2022 at 2:59 comment added jonk @SteveSh I did make that assumption. And it could be that one of the trinary (balanced or otherwise) concepts was implied. That said, 'Rd' did happen to respond to the answer here discussing 3-state outputs and didn't disagree. So that may be a small bit of evidence to consider in addition to the question, itself.
Oct 26, 2022 at 1:08 comment added jsotola @RdBasha Do you have some source showing how it is built? ... you still have not clarified what you are actually asking about
Oct 25, 2022 at 23:57 comment added SteveSh @jonk - You're assuming that the hi-Z state is a 3rd logic level. I'm not sure that's what OP was asking about, and hence my first comment. Note that Intel way back in the 70's actually implemented ternary logic (3 voltage levels) in one of the PROMs ,IIRC.
Oct 25, 2022 at 22:16 comment added jonk @RdBasha Wouldn't you just go to the Texas Instruments databook on the 7400 series devices and examine their schematics for "gates with 3-state outputs?" It's there, I believe. I forget what chapter, but it is roughly in the middle of the book.
Oct 25, 2022 at 21:55 history edited Justme CC BY-SA 4.0
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Oct 25, 2022 at 21:21 comment added Rd Basha Thanks. Do you have some source showing how it is built? I know that I can just use the tools from Logisim, but I'm interested in building them myself fom scratch.
Oct 25, 2022 at 21:17 history answered Justme CC BY-SA 4.0