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Spehro 'speff' Pefhany
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Where you have options, you can give some thought to physical connections if you expect layout to be gnarly, or you can give some thought to logical arrangement if you expect to need to wring the last bit of speed out of the MCU, but often these days it's not so important - we often have luxurious amounts of speed and potential layout density (and you can always go back and revise it later if necessary- non-trivial design is typically iterative).

Generally, I think optimizing the logical connections make more sense even if it's a bit harder on the layout dude (and even if the layout dude happens to be you). Of course there will be exceptions (for example, you might be cramming a chip into a narrow housing and you can't even use some of the pins realistically).

And don't forget to make the schematic easy to read (start with that) and document design decisions, perhaps by separating the pins in blocks into different schematic symbols if there are a plethora of them. That will minimize the potential issues with communicating with the firmware dude (even if that dude happens to be you) and for potential future revisions (you might be surprised by how much gets forgotten in a few short years with many projects inbetween).

Although links to external 'answers' are frowned upon here, I would suggest seeking out the video tutorials of people such as Robert Feranec and Phil Salmony and following many of their recommendations on creating both schematics and layouts. There is far more to this than can be contained in a dozen suitable-length answers here.

Where you have options, you can give some thought to physical connections if you expect layout to be gnarly, or you can give some thought to logical arrangement if you expect to need to wring the last bit of speed out of the MCU, but often these days it's not so important - we often have luxurious amounts of speed and potential layout density (and you can always go back and revise it later if necessary- non-trivial design is typically iterative).

Generally, I think optimizing the logical connections make more sense even if it's a bit harder on the layout dude (and even if the layout dude happens to be you). Of course there will be exceptions (for example, you might be cramming a chip into a narrow housing and you can't even use some of the pins realistically).

And don't forget to make the schematic easy to read (start with that) and document design decisions, perhaps by separating the pins in blocks into different schematic symbols if there are a plethora of them. That will minimize the potential issues with communicating with the firmware dude (even if that dude happens to be you) and for potential future revisions (you might be surprised by how much gets forgotten in a few short years with many projects inbetween).

Where you have options, you can give some thought to physical connections if you expect layout to be gnarly, or you can give some thought to logical arrangement if you expect to need to wring the last bit of speed out of the MCU, but often these days it's not so important - we often have luxurious amounts of speed and potential layout density (and you can always go back and revise it later if necessary- non-trivial design is typically iterative).

Generally, I think optimizing the logical connections make more sense even if it's a bit harder on the layout dude (and even if the layout dude happens to be you). Of course there will be exceptions (for example, you might be cramming a chip into a narrow housing and you can't even use some of the pins realistically).

And don't forget to make the schematic easy to read (start with that) and document design decisions, perhaps by separating the pins in blocks into different schematic symbols if there are a plethora of them. That will minimize the potential issues with communicating with the firmware dude (even if that dude happens to be you) and for potential future revisions (you might be surprised by how much gets forgotten in a few short years with many projects inbetween).

Although links to external 'answers' are frowned upon here, I would suggest seeking out the video tutorials of people such as Robert Feranec and Phil Salmony and following many of their recommendations on creating both schematics and layouts. There is far more to this than can be contained in a dozen suitable-length answers here.

Source Link
Spehro 'speff' Pefhany
  • 422.9k
  • 23
  • 352
  • 952

Where you have options, you can give some thought to physical connections if you expect layout to be gnarly, or you can give some thought to logical arrangement if you expect to need to wring the last bit of speed out of the MCU, but often these days it's not so important - we often have luxurious amounts of speed and potential layout density (and you can always go back and revise it later if necessary- non-trivial design is typically iterative).

Generally, I think optimizing the logical connections make more sense even if it's a bit harder on the layout dude (and even if the layout dude happens to be you). Of course there will be exceptions (for example, you might be cramming a chip into a narrow housing and you can't even use some of the pins realistically).

And don't forget to make the schematic easy to read (start with that) and document design decisions, perhaps by separating the pins in blocks into different schematic symbols if there are a plethora of them. That will minimize the potential issues with communicating with the firmware dude (even if that dude happens to be you) and for potential future revisions (you might be surprised by how much gets forgotten in a few short years with many projects inbetween).