Timeline for Attaching Ethernet interface to an SoC which has no embedded Ethernet circuit
Current License: CC BY-SA 4.0
11 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Jan 19, 2023 at 6:00 | history | tweeted | twitter.com/StackElectronix/status/1615952199414079489 | ||
| Jan 18, 2023 at 15:25 | comment | added | tomnexus | Lantronix or Moxa Serial-Ethernet module? Or an ESP8266 WiFi-Serial module? | |
| Jan 18, 2023 at 13:05 | answer | added | jpa | timeline score: 4 | |
| Jan 18, 2023 at 12:50 | history | became hot network question | |||
| Jan 18, 2023 at 9:57 | comment | added | Chan Kim | We are using proFPGA board, but we want to keep the logic inside the FPGA as exactly the same to the final SOC as possible. | |
| Jan 18, 2023 at 9:36 | vote | accept | Chan Kim | ||
| Jan 18, 2023 at 8:54 | comment | added | Marcus Müller | What's the FPGA platform, and if applicable, the FPGA board you're developing this one? This makes a difference, because typcially, you get Ethernet MAC IP that you can directly wire up to a set of GPIO pads to connect to a PHY IC, from the FPGA vendor – typically even for free (at least for "old" ethernet standards like fast and gigabit ethernet and the RMII and RGMII interface standards) | |
| Jan 18, 2023 at 6:07 | answer | added | hacktastical | timeline score: 4 | |
| Jan 18, 2023 at 5:05 | history | edited | Armandas | CC BY-SA 4.0 |
deleted 16 characters in body; edited tags
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| S Jan 18, 2023 at 4:49 | review | First questions | |||
| Jan 18, 2023 at 6:09 | |||||
| S Jan 18, 2023 at 4:49 | history | asked | Chan Kim | CC BY-SA 4.0 |