Timeline for BCD full adder subtraction and addition
Current License: CC BY-SA 4.0
26 events
| when toggle format | what | by | license | comment | |
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| Feb 15, 2023 at 22:03 | vote | accept | Mohammed Al-Elaiwi | ||
| Feb 15, 2023 at 8:21 | comment | added | periblepsis | @Mohammed You can't delete them. You just don't simulate them. You are in control. Do it manually. Why do you permit a 1010 in B? Just don't do it. | |
| Feb 15, 2023 at 8:19 | comment | added | Mohammed Al-Elaiwi | i know the BCD is from 0 to 9, but my question how can i delete hexadecimal numbers? i want the 7-segment get 0 when B (1010) in minus And the counting begins again, should i put a new Full adder? | |
| Feb 15, 2023 at 8:08 | comment | added | periblepsis | @Mohammed Then you just need to understand that while a simulator may allow you to change the bits so that the B input is 10 and the A input is zero, when subtracting, that having B=10 is not legal. The simulator doesn't care about "legal". All it cares about is that you have 4 bits and this means anything from 0 to 15 is fine. But you know that BCD can only be up to 9. So B must be only from 0 to 9, not 0 to 15. | |
| Feb 15, 2023 at 7:54 | comment | added | Mohammed Al-Elaiwi | it's 4-bit iinputs limited to BCD-only, to hoenst i don't understand how you make -10, but i put Comparator 74LS83D, if A>B when B=9 at the output will be 1 in double-digit , but the output gaves me (-1A), the problem is in The unit digit. | |
| Feb 13, 2023 at 19:09 | comment | added | periblepsis | @Mohammed So here's the central questions you need to answer. (1) Are these 4-bit iinputs limited to BCD-only? If not limited and instead they are binary, then you need to answer another question: (2) Are they both signed binary or both unsigned binary (or some other mixture of those)? All these things matter before a design can be generated. | |
| Feb 13, 2023 at 7:52 | comment | added | periblepsis | @Mohammed That may not be needed. It's just in this case you need to turn on the line going to the 2nd adder's A1 and A2 inputs, for the negative case. I'd excluded that. But it can be included. | |
| Feb 13, 2023 at 7:49 | comment | added | Mohammed Al-Elaiwi | i thaink of using extra adder to make condition to make nuamebr smailler than -9, add (and,or) gates to new full adder | |
| Feb 13, 2023 at 7:39 | comment | added | periblepsis | @Mohammed Here's an example that will handle 0 - 10. | |
| Feb 13, 2023 at 7:28 | comment | added | periblepsis | @Mohammed I didn't design this for binary. You mentioned BCD. | |
| Feb 13, 2023 at 7:23 | comment | added | Mohammed Al-Elaiwi | I had some errors in connecting the circuit, I fixed the problem and it works as it should, but can you show me 0-10 = -10? because it will show me a hexadecimal | |
| Feb 12, 2023 at 0:23 | comment | added | periblepsis | @Mohammed Then you didn't get the right schematic. Here's the 0 - 8 = -8 example. You can see it works fine. And here's the 9+8 = 17 example. It also works fine. I've thoroughly checked it out. It works in every single case. I also automated the testing, as well. It's possible you may need to learn a little more about your simulator. | |
| Feb 11, 2023 at 23:25 | comment | added | Mohammed Al-Elaiwi | I tried your design, it can give me output 9 + 9 = 18, but for some reasons the output can't give me 17 and 1, and another problem if i put 0-8 it gave me -7, also it give me hexadecimal number in subtractor | |
| Feb 10, 2023 at 18:26 | comment | added | periblepsis | @greybeard I think the questioner is stuck with 7483s, whether mentally or by outside requirements. I've not used the 4000 series devices. (Too expensive, too few in variety, too difficult to find, and I never did lay hands on an RCA databook back when I was in my multi-board wire-wrapping days.) And thanks again for the kick in the head! | |
| Feb 9, 2023 at 22:43 | history | edited | periblepsis | CC BY-SA 4.0 |
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| Feb 9, 2023 at 22:38 | comment | added | periblepsis | @greybeard Okay. Thanks. I think I see my folly. Yeah. If I'm adding 3 (6), then it must be because I expect to see a 1 in the tens digit. (I'm an idiot!) I'll make the adjustment. And thanks! | |
| Feb 9, 2023 at 22:27 | history | rollback | periblepsis |
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| Feb 9, 2023 at 22:24 | history | edited | periblepsis | CC BY-SA 4.0 |
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| Feb 9, 2023 at 13:42 | comment | added | greybeard | You already generate a signal decimal carry in addition: this is the LSB of the more significant digit, you don't need to recompute it from S1…4, saving at least the uppermost AND with one inverted input. | |
| Feb 9, 2023 at 3:21 | history | edited | periblepsis | CC BY-SA 4.0 |
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| Feb 9, 2023 at 0:35 | history | edited | periblepsis | CC BY-SA 4.0 |
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| Feb 9, 2023 at 0:29 | history | edited | periblepsis | CC BY-SA 4.0 |
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| Feb 9, 2023 at 0:24 | history | edited | periblepsis | CC BY-SA 4.0 |
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| Feb 8, 2023 at 18:52 | history | edited | periblepsis | CC BY-SA 4.0 |
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| Feb 8, 2023 at 18:46 | history | edited | periblepsis | CC BY-SA 4.0 |
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| Feb 8, 2023 at 18:41 | history | answered | periblepsis | CC BY-SA 4.0 |
