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Feb 18, 2023 at 10:20 comment added winny That didn’t answer my question. Please update your question with a list of each layer, 1-10, stating what’s routed or poured on it.
Feb 18, 2023 at 4:50 answer added Bruce Abbott timeline score: 1
Feb 17, 2023 at 22:57 history edited JYelton CC BY-SA 4.0
Formatting
Feb 17, 2023 at 22:51 comment added RogerDodger @JediEngineer, your last comment there saying laying out digital electronics where ever, probably isn't a good approach. For EMC/SI/PI, stackup and circuit and component placement play a very important role. I don't know your experience, or the circuit, or, anything your really doing, but, really focus on placement, routing signals where there references are (1 dielectric away) and, really thinking about your return currents. Not routing current sense lines return path through the switched 400V 10A path. Stuff like that
Feb 17, 2023 at 22:43 comment added Jedi Engineer @winny - opening the soldermask isn't an option. My stackup is 10 layer 093, but nothing is set in stone yet. I'm just starting to lay copper now. Currently, power devices on top layer, digital electronics on the bottom layers wherever possible. I'm reserving layer 7 as a ground plane.
Feb 17, 2023 at 22:41 comment added Jedi Engineer @RogerDodger - I'm doing the best I can, but I'm prohibited from sharing the schematic and layout.
Feb 17, 2023 at 21:58 comment added RogerDodger With out schematic, layer stack, and seeing what you have done layout wise this is pretty near impossible to answer. At least in my opinion :)
Feb 17, 2023 at 21:39 comment added winny What’s your stack up? Which layers have what on them? Is opening the soldermask layers on the outer layers an option for you to get lower resistance?
Feb 17, 2023 at 21:36 history asked Jedi Engineer CC BY-SA 4.0