Timeline for GPIO directly driving a P-channel: voltage too high?
Current License: CC BY-SA 4.0
7 events
| when toggle format | what | by | license | comment | |
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| Mar 15, 2023 at 19:05 | comment | added | user319836 | See my update @VoltsAndNuts. | |
| Mar 15, 2023 at 19:04 | history | edited | user319836 | CC BY-SA 4.0 |
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| Mar 15, 2023 at 12:51 | comment | added | VoltsAndNuts | @RussellH Thank you for the schematic. However that does invert the signal, doesn't it? I'd like to keep the logic as is so, should I add another PNP stage in order to to do so? | |
| Mar 15, 2023 at 1:52 | comment | added | user319836 | @evildemonic Finger trouble. Now there are 2. Thanks | |
| Mar 15, 2023 at 1:52 | history | edited | user319836 | CC BY-SA 4.0 |
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| Mar 15, 2023 at 1:52 | comment | added | evildemonic | I only see one diagram. | |
| Mar 15, 2023 at 1:40 | history | answered | user319836 | CC BY-SA 4.0 |