Skip to main content
Electrical Engineering

Return to Answer

deleted 4 characters in body
Source Link
John Birckhead
John Birckhead
  • 11.8k
  • 1
  • 13
  • 29

Your error budget needs to account for the following: ADC_PS1 has is off 1.8%; ADC_PS2 has an error of 1.3% from theoretical.

  • AD623BRZ has an input offset voltage up to 100uV. With a gain of 62, this is 6.2 mv, or about 1.8% worst case.
  • Transducer full scale range is 10.5 mV/V. Offset is +/- 0.075mV/V, or 0.7%FS.
  • MCU (STM32L476ZGT3) advertises only 5 LSB total error (0.1%). However, it has analog input resistance of up to 50K, depending on sampling rate. Only ADC_PS1 and ADC_PS2 have a low enough impedance to keep this from factoring in. Each of your other two sampling points has a high impedance, and each has a different impedance.

Your circuit seems to be operating within its design specs.

Your error budget needs to account for the following: ADC_PS1 has is off 1.8%; ADC_PS2 has an error of 1.3% from theoretical.

  • AD623BRZ has an input offset voltage up to 100uV. With a gain of 62, this is 6.2 mv, or about 1.8% worst case.
  • Transducer full scale range is 10.5 mV/V. Offset is +/- 0.075mV/V, or 0.7%FS.
  • MCU (STM32L476ZGT3) advertises only 5 LSB total error (0.1%). However, it has analog input resistance of up to 50K, depending on sampling rate. Only ADC_PS1 and ADC_PS2 have a low enough impedance to keep this from factoring in. Each of your other two sampling points has a high impedance, and each has a different impedance.

Your circuit seems to be operating within its design specs.

Your error budget needs to account for the following: ADC_PS1 is off 1.8%; ADC_PS2 has an error of 1.3% from theoretical.

  • AD623BRZ has an input offset voltage up to 100uV. With a gain of 62, this is 6.2 mv, or about 1.8% worst case.
  • Transducer full scale range is 10.5 mV/V. Offset is +/- 0.075mV/V, or 0.7%FS.
  • MCU (STM32L476ZGT3) advertises only 5 LSB total error (0.1%). However, it has analog input resistance of up to 50K, depending on sampling rate. Only ADC_PS1 and ADC_PS2 have a low enough impedance to keep this from factoring in. Each of your other two sampling points has a high impedance, and each has a different impedance.

Your circuit seems to be operating within its design specs.

Source Link
John Birckhead
John Birckhead
  • 11.8k
  • 1
  • 13
  • 29

Your error budget needs to account for the following: ADC_PS1 has is off 1.8%; ADC_PS2 has an error of 1.3% from theoretical.

  • AD623BRZ has an input offset voltage up to 100uV. With a gain of 62, this is 6.2 mv, or about 1.8% worst case.
  • Transducer full scale range is 10.5 mV/V. Offset is +/- 0.075mV/V, or 0.7%FS.
  • MCU (STM32L476ZGT3) advertises only 5 LSB total error (0.1%). However, it has analog input resistance of up to 50K, depending on sampling rate. Only ADC_PS1 and ADC_PS2 have a low enough impedance to keep this from factoring in. Each of your other two sampling points has a high impedance, and each has a different impedance.

Your circuit seems to be operating within its design specs.