Timeline for Binary to BCD conversion besides double dabble
Current License: CC BY-SA 4.0
7 events
when toggle format | what | by | license | comment | |
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Apr 6, 2023 at 19:21 | vote | accept | Jason C | ||
Apr 6, 2023 at 1:33 | comment | added | Jason C | For driving 7 segment displays. | |
Apr 6, 2023 at 0:10 | comment | added | periblepsis | Jason, do you want to use the BCD for BCD-7-seg displays? If so, that's a very different question (in terms of optimizing, anyway.) Or do you need the BCD for something else? You can just lay out the 16-bit to BCD (the upper-most BCD digit only needs 3 bits, not 4) and feed it to an algorithm to minimize, if you want. Or you can start there and hand-optimize its output. (You can almost always do better for something of this complexity -- even for algorithms that claim to 'minimize'.) Just for reference only, here's the generic double-dabble approach. | |
Apr 5, 2023 at 19:29 | comment | added | greybeard | (16 bit to 5×7 segment signals may or may not be a more useful circuit - think integrated.) | |
Apr 5, 2023 at 19:21 | comment | added | greybeard | You can implement components similar to the 5-in, 5-out implementation 74X185, but with more bits/terminals. Looking a bit closer, you'll see double dabble again, closer still, gates, then switches. One obvious approach would be to describe the full bundle of 19 binary functions of 16 variables and have it "optimised" and realised/mapped by some tool chain. See Kuba Ober's answer for an essentially 2 level and/or(NAND/NAND) + register implementation. | |
Apr 5, 2023 at 19:08 | answer | added | Kuba hasn't forgotten Monica | timeline score: 1 | |
Apr 5, 2023 at 19:02 | history | asked | Jason C | CC BY-SA 4.0 |