Skip to main content
Electrical Engineering

Return to Question

deleted 9 characters in body
Source Link
winny
winny
  • 16.8k
  • 6
  • 50
  • 71

I want to know that most of the semi conductorsemiconductor top side cooled package have more than one power source terminal. I can understand by doing so you can minimze the loop inductance of gate driver loop howerver it latest HU3PAK of ST it has drain, with terminal 1 as gate and terminal 2 as kelvinKelvin connection and then terminal 3,4,5,6,7 are power sources. what sort of benifitWhat benefit has this sort of architecture has?

I want to know that most of the semi conductor top side cooled package have more than one power source terminal. I can understand by doing so you can minimze the loop inductance of gate driver loop howerver it latest HU3PAK of ST it has drain, with terminal 1 as gate and terminal 2 as kelvin connection and then terminal 3,4,5,6,7 are power sources. what sort of benifit this sort of architecture has?

I want to know that most of the semiconductor top side cooled package have more than one power source terminal. I can understand by doing so you can minimze the loop inductance of gate driver loop howerver it latest HU3PAK of ST it has drain, with terminal 1 as gate and terminal 2 as Kelvin connection and then terminal 3,4,5,6,7 are power sources. What benefit has this sort of architecture?

Source Link
Alison
Alison
  • 357
  • 3
  • 9

Multiple Source Terminals of SiC MOSFET

I want to know that most of the semi conductor top side cooled package have more than one power source terminal. I can understand by doing so you can minimze the loop inductance of gate driver loop howerver it latest HU3PAK of ST it has drain, with terminal 1 as gate and terminal 2 as kelvin connection and then terminal 3,4,5,6,7 are power sources. what sort of benifit this sort of architecture has?