Timeline for Unknown logic gate on circuit
Current License: CC BY-SA 4.0
3 events
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| Oct 20, 2023 at 21:50 | comment | added | Dave Tweed | @effect: Yes, but the gate to the left of that is acting as a buffer for the FF's Q output. It couldn't be tied in directly, because it is also used elsewhere. That was probably the most convenient way to "tie off" the NOT input of that buffer gate. Logic like this tends to be full of implementation details that don't make a whole lot of logical sense. | |
| Oct 20, 2023 at 20:11 | comment | added | effect |
The instance of the symbol on the right side of the diagram makes sense as being a wired-OR configuration, but the instance on the left is confusing to me. It appears to be implementing X OR (NOT(X) AND Y). isn't this the same as X OR Y?
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| Oct 20, 2023 at 11:02 | history | answered | Dave Tweed | CC BY-SA 4.0 |