Timeline for (Updated) Strange reset behavior with ARM9 processor
Current License: CC BY-SA 2.5
4 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Nov 17, 2010 at 14:54 | comment | added | pingswept | Yes, all the JTAG inputs are pulled up to 3.3 V, so their state shouldn't change unless JTAG is attached and driving them. | |
| Nov 17, 2010 at 4:30 | comment | added | Tim Williscroft | you are pulling the jtag tclk and trst to safe states ? | |
| Nov 17, 2010 at 4:02 | comment | added | pingswept | Good idea. I just checked over the schematic and the PCB layout. I don't see any accidental address line crossings or misconnections. I did notice that the JTAG connector is directly under the RAM, but they're separated by two power planes, and the board boots correctly under JTAG control. It's when the JTAG is inactive that the problem occurs. | |
| Nov 17, 2010 at 3:16 | history | answered | Tim Williscroft | CC BY-SA 2.5 |