Timeline for STM32 H7 - Outputs wrong I2S BCLK (1.027 Mhz pulses, expected 1.024)?
Current License: CC BY-SA 4.0
7 events
when toggle format | what | by | license | comment | |
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Oct 31, 2023 at 1:40 | answer | added | Kevin Parker | timeline score: 0 | |
Oct 30, 2023 at 22:07 | comment | added | Kevin Parker | @Justme, one is an ESP32 producing the correct clock and the problem is with the STM32... brhans, edited to include the clocks | |
Oct 30, 2023 at 22:05 | history | edited | Kevin Parker | CC BY-SA 4.0 |
Added Clocks Config Page
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Oct 30, 2023 at 20:29 | comment | added | brhans | Show us your PLL configuration. | |
Oct 30, 2023 at 20:23 | history | edited | brhans | CC BY-SA 4.0 |
edited body
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Oct 30, 2023 at 20:08 | comment | added | Justme | Again, same or different STM32H7 and if same then which is it again? And the rest of the clock settings? | |
Oct 30, 2023 at 19:57 | history | asked | Kevin Parker | CC BY-SA 4.0 |