Timeline for SPI read of MAX31856 in Verilog
Current License: CC BY-SA 4.0
7 events
| when toggle format | what | by | license | comment | |
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| Dec 23, 2023 at 2:50 | comment | added | user353944 | The configuration register data should be present on sdi line some time before the SCLK edge appears. There is a parameter for that in data sheet and approx 80ns. I am bamboozled how to model this in state machine??? Also a simple inquiry after reading the data sheet that chip operating in mode 3 only?? | |
| Dec 23, 2023 at 2:46 | comment | added | user353944 | I moved one step forward. The state machine is free running now and working in simulation. On hardware side there is no temperature data output from chip. I am assuming tcDhh parameter in the data sheet is not satisfied. To test the spi before the temperate data state, i want to read back the configuration register CR0 which i have written at the start of state machine. If that doesnot work i will post code here | |
| Dec 14, 2023 at 13:51 | comment | added | Dave Tweed | That isn't how this site works. You paste your code (or a link to it) -- preferably reduced to an MCVE -- into your question. Then everyone can take a look at it. | |
| Dec 14, 2023 at 2:46 | comment | added | user353944 | I want to share code with you.. Can u please share your email with me. Its a model sim simulation stuck in the state machine. Not a free running state machine. | |
| Nov 16, 2023 at 16:58 | comment | added | Dave Tweed | It appears that the chip simply ignores any bytes sent after the address byte when doing a read. So yes, those are "dummy" bytes. | |
| Nov 16, 2023 at 16:36 | comment | added | user353944 | Thanks for prompt reply. Can u please elobrate point 6? Do i need to send the address 0XC only or some dummy bytes too on mosi line? And some adafruit driver libraries are not using DRDY pin. Then how those C libraries working? | |
| Nov 16, 2023 at 0:29 | history | answered | Dave Tweed | CC BY-SA 4.0 |