About fig. 9.14 a) & b).

a) $$ V_{g_1}-V_{s_1} - V_{th_1} \leq V_{d_1}-V_{s_1} $$

Simplify: $$ V_{g_1}-V_{th_1} \leq V_{d_1} $$ Mind you, \$V_{g_1}=V_{g_2}=V_{cm}\$ (same for picture b).

Then, we can write the drain voltage of M1 as: $$ V_{d_1} = V_{s_3} = V_{b_1} - V_{gs_3} $$ In other words, we "walk" down from \$V_{b_1}\$ by a \$V_{gs}\$ term.

Then, replace \$V_{d_1}\$ by the last expression: $$ V_{g_1}-V_{th_1} \leq V_{b_1}-V_{gs_3} $$ Re-arranging: $$ V_{g_1} \leq V_{b_1}-V_{gs_3} +V_{th_1} $$ Done.

Start the same way for picture b). I'll skip the 1st step (I started from the \$V_{sg}\$ because it's a PMOS.) : $$ -V_{g_1} - |V_{th_1}| \leq -V_{d_1} $$ We know that \$V_{d_1} = V_{b_1} - V_{gs_3}\$ here as well. First, get rid of the minus signs and isolate \$V_{g_1}\$: $$ V_{g_1} \geq V_{d_1} - |V_{th_1}| $$

Replace the \$V_{d_1}\$ term with its equivalent as we did picture a) and we're done: $$ V_{g_1} \geq V_{b_1} - V_{gs_3} - |V_{th_1}| $$

Razavi wrote \$V_{thp}\$, but that's to probably notate it's a PMOS, he's definitely referring to M1 in picture b.

On to your Question 2).

I believe, since he's using an actual transistor to implement the tail current of those diff. amps in picture 4.9 (unlike picture 9.14), then he can also write both top and bottom limits of the common-mode voltage at the input; you cannot go to high because M1 will be out of saturation, and you cannot go too low because M3 might stop behaving like a current source.

He probably didn't use the other limit in picture 9.14 because an ideal current source has no minimum drain-source voltage, it's ideal after all.

Question 3)

It's easy to see that going from \$V_{cm,in}\$ down to the drain of M3 requires us to drop by a \$V_{gs}\$ term, which is the drop across gate-to-source voltage of M1.

About fig. 9.14 a) & b).

a) $$ V_{g_1}-V_{s_1} - V_{th_1} \leq V_{d_1}-V_{s_1} $$

Simplify: $$ V_{g_1}-V_{th_1} \leq V_{d_1} $$ Mind you, \$V_{g_1}=V_{g_2}=V_{cm}\$ (same for picture b).

Then, we can write the drain voltage of M1 as: $$ V_{d_1} = V_{s_3} = V_{b_1} - V_{gs_3} $$ In other words, we "walk" down from \$V_{b_1}\$ by a \$V_{gs}\$ term.

Then, replace \$V_{d_1}\$ by the last expression: $$ V_{g_1}-V_{th_1} \leq V_{b_1}-V_{gs_3} $$ Re-arranging: $$ V_{g_1} \leq V_{b_1}-V_{gs_3} +V_{th_1} $$ Done.

Start the same way for picture b). I'll skip the 1st step (I started from the \$V_{sg}\$ because it's a PMOS.) : $$ -V_{g_1} - |V_{th_1}| \leq -V_{d_1} $$ We know that \$V_{d_1} = V_{b_1} - V_{gs_3}\$ here as well. First, get rid of the minus signs and isolate \$V_{g_1}\$: $$ V_{g_1} \geq V_{d_1} - |V_{th_1}| $$

Replace the \$V_{d_1}\$ term with its equivalent as we did picture a) and we're done: $$ V_{g_1} \geq V_{b_1} - V_{gs_3} - |V_{th_1}| $$

Razavi wrote \$V_{thp}\$, but that's to probably notate it's a PMOS, he's definitely referring to M1 in picture b.

On to your Question 2).

I believe, since he's using an actual transistor to implement the tail current of those diff. amps in picture 4.9 (unlike picture 9.14), then he can also write both top and bottom limits of the common-mode voltage at the input; you cannot go too high because M1 will be out of saturation, and you cannot go too low because M3 will stop behaving like a current source.

He probably didn't use the other limit in picture 9.14 because an ideal current source has no minimum compliance voltage at it's terminals; they can be negative and the current will still be flowing, it's ideal after all.

Question 3)

It's easy to see that going from \$V_{cm,in}\$ down to the drain of M3 requires us to drop by a \$V_{gs}\$ term, which is the drop across gate-to-source voltage of M1.

About fig. 9.14 a) & b).

a) $$ V_{g_1}-V_{s_1} - V_{th_1} \leq V_{d_1}-V_{s_1} $$

Simplify: $$ V_{g_1}-V_{th_1} \leq V_{d_1} $$ Mind you, \$V_{g_1}=V_{g_2}=V_{cm}\$ (same for picture b).

Then, we can write the drain voltage of M1 as: $$ V_{d_1} = V_{s_3} = V_{b_1} - V_{gs_3} $$ In other words, we "walk" down from \$V_{b_1}\$ by a \$V_{gs}\$ term.

Then, replace \$V_{d_1}\$ by the last expression: $$ V_{g_1}-V_{th_1} \leq V_{b_1}-V_{gs_3} $$ Re-arranging: $$ V_{g_1} \leq V_{b_1}-V_{gs_3} +V_{th_1} $$ Done.

Start the same way for picture b). I'll skip the 1st step (I started from the \$V_{sg}\$ because it's a PMOS.) : $$ -V_{g_1} - |V_{th_1}| \leq -V_{d_1} $$ We know that \$V_{d_1} = V_{b_1} - V_{gs_3}\$ here as well. First, get rid of the minus signs and isolate \$V_{g_1}\$: $$ V_{g_1} \geq V_{d_1} - |V_{th_1}| $$

Replace the \$V_{d_1}\$ term with its equivalent as we did picture a) and we're done: $$ V_{g_1} \geq V_{b_1} - V_{gs_3} - |V_{th_1}| $$

Razavi wrote \$V_{thp}\$, but that's to probably notate it's a PMOS, he's definitely referring to M1 in picture b.

On to your Question 2).

I believe, since he's using an actual transistor to implement the tail current of those diff. amps in picture 4.9 (unlike picture 9.14), then he can also write both top and bottom limits of the common-mode voltage at the input; you cannot go to high because M1 will be out of saturation, and you cannot go to low because M3 might stop behaving like a current source.

He probably didn't use the other limit in picture 9.14 because an ideal current source has no minimum drain-source voltage, it's ideal after all.

Question 3)

It's easy to see that going from \$V_{cm,in}\$ down to the drain of M3 requires us to drop by a \$V_{gs}\$ term, which is the drop across gate-to-source voltage of M1.

About fig. 9.14 a) & b).

a) $$ V_{g_1}-V_{s_1} - V_{th_1} \leq V_{d_1}-V_{s_1} $$

Simplify: $$ V_{g_1}-V_{th_1} \leq V_{d_1} $$ Mind you, \$V_{g_1}=V_{g_2}=V_{cm}\$ (same for picture b).

Then, we can write the drain voltage of M1 as: $$ V_{d_1} = V_{s_3} = V_{b_1} - V_{gs_3} $$ In other words, we "walk" down from \$V_{b_1}\$ by a \$V_{gs}\$ term.

Then, replace \$V_{d_1}\$ by the last expression: $$ V_{g_1}-V_{th_1} \leq V_{b_1}-V_{gs_3} $$ Re-arranging: $$ V_{g_1} \leq V_{b_1}-V_{gs_3} +V_{th_1} $$ Done.

Start the same way for picture b). I'll skip the 1st step (I started from the \$V_{sg}\$ because it's a PMOS.) : $$ -V_{g_1} - |V_{th_1}| \leq -V_{d_1} $$ We know that \$V_{d_1} = V_{b_1} - V_{gs_3}\$ here as well. First, get rid of the minus signs and isolate \$V_{g_1}\$: $$ V_{g_1} \geq V_{d_1} - |V_{th_1}| $$

Replace the \$V_{d_1}\$ term with its equivalent as we did picture a) and we're done: $$ V_{g_1} \geq V_{b_1} - V_{gs_3} - |V_{th_1}| $$

Razavi wrote \$V_{thp}\$, but that's to probably notate it's a PMOS, he's definitely referring to M1 in picture b.

On to your Question 2).

I believe, since he's using an actual transistor to implement the tail current of those diff. amps in picture 4.9 (unlike picture 9.14), then he can also write both top and bottom limits of the common-mode voltage at the input; you cannot go to high because M1 will be out of saturation, and you cannot go too low because M3 might stop behaving like a current source.

He probably didn't use the other limit in picture 9.14 because an ideal current source has no minimum drain-source voltage, it's ideal after all.

Question 3)

It's easy to see that going from \$V_{cm,in}\$ down to the drain of M3 requires us to drop by a \$V_{gs}\$ term, which is the drop across gate-to-source voltage of M1.