I have a bunch of J112 JFETs and would like to use them for high impedance input stage, but I'm a bit confused because the datasheet says that it's Idss should be about 5 mA, but when I measured it, I already get 17 mA at -1.85 V at the gate (with 12 V supply voltage), it started to dissipate quite a lot of power, so I stopped increasing the gate voltage. Is it normal for it to behave like that?

I found what looks like a nice linear region (painted it green, gate voltages are negative of course, just used absolute values for the chart) in the characteristic with bias point set to -2.570 V and 8 mA, can I use my JFET in this region? If the current exceeds Idss, won't it damage the device (given I don't exceed the maximum power dissipation), or should I still use the region below 5 mA? It's kinda curved down there (the second graph) and bias voltage seems too low at <-3 V.

I have a bunch of J112 JFETs and would like to use them for high impedance input stage, but I'm a bit confused because the datasheet says that its Idss should be about 5 mA, but when I measured it, I already get 17 mA at -1.85 V at the gate (with 12 V supply voltage), it started to dissipate quite a lot of power, so I stopped increasing the gate voltage. Is it normal for it to behave like that?

I found what looks like a nice linear region (painted it green, gate voltages are negative of course, just used absolute values for the chart) in the characteristic with bias point set to -2.570 V and 8 mA, can I use my JFET in this region? If the current exceeds Idss, won't it damage the device (given I don't exceed the maximum power dissipation), or should I still use the region below 5 mA? It's kinda curved down there (the second graph) and bias voltage seems too low at <-3 V.

I have a bunch of J112 JFETS and would like to use them for high impedance input stage, but I'm a bit confused cause the datasheet says that it's Idss should be about 5mA, but when I measured it, I already get 17mA at -1.85V at the gate (with 12V supply voltage), it started to dissipate quite a lot of power, so I stopped icreasing the gate voltage. Is it normal for it to behave like that?

I found what looks like a nice linear region (painted it green, gate voltages are negative of course, just used absolute values for the chart) in the characteristic with bias point set to -2.570V and 8mA, can I use my jfet in this region? If the current exceeds Idss, won't it damage the device (given I don't exceed the maximum power dissipation) or should I still use the region below 5mA? It's kinda curved down there (the second graph) and bias voltage seems too low at <-3V.

I have a bunch of J112 JFETs and would like to use them for high impedance input stage, but I'm a bit confused because the datasheet says that it's Idss should be about 5 mA, but when I measured it, I already get 17 mA at -1.85 V at the gate (with 12 V supply voltage), it started to dissipate quite a lot of power, so I stopped increasing the gate voltage. Is it normal for it to behave like that?

I found what looks like a nice linear region (painted it green, gate voltages are negative of course, just used absolute values for the chart) in the characteristic with bias point set to -2.570 V and 8 mA, can I use my JFET in this region? If the current exceeds Idss, won't it damage the device (given I don't exceed the maximum power dissipation), or should I still use the region below 5 mA? It's kinda curved down there (the second graph) and bias voltage seems too low at <-3 V.