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Timeline for Op-amp virtual ground compensation

Current License: CC BY-SA 4.0

10 events
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Dec 14 at 5:23 comment added Raonoke There is nothing "virtual" about the 2.5 V REF voltage generated by the REF buffer to bias the main amplifier. The in-loop compensation cap C2 (1nF) is too small which makes the buffer, due to the large capacitive load, unstable. The output impedance of the buffer as shown is close to 900 Ohm around 160 Hz. As this impedance is in series with resistor R4 (5.1 k) from the main amplifier, the gain will be off at the mentioned frequency.
Dec 13 at 15:41 comment added MeGrogu "This circuit is used for example only and does not represent actual working conditions" Maybe providing more details about them would contribute to receiving more detailed suggestions.
Dec 13 at 15:09 answer added Math Keeps Me Busy timeline score: 0
Dec 13 at 14:31 answer added Kuba hasn't forgotten Monica timeline score: 1
Dec 13 at 14:22 history edited Transistor CC BY-SA 4.0
added 3 characters in body; edited title
Dec 13 at 13:31 comment added pigeon CNC Thank you, I've added the graphics and some clarifications
Dec 13 at 13:29 history edited pigeon CNC CC BY-SA 4.0
added 411 characters in body
Dec 13 at 12:36 comment added Simon Fitch Why do you offset your amplifier's input using V2 w.r.t. ground, instead of w.r.t. to REF? Why would you go to all the trouble of producing \$V_{REF}\$, and then not share it? I'd like to see the bode plot with V3 relative to REF.
Dec 13 at 11:47 answer added Tyassin timeline score: 0
Dec 13 at 11:40 history asked pigeon CNC CC BY-SA 4.0