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Post Reopened by JYelton, markrages
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JYelton
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Is it possible to have multiple ISR routineroutines for a single timer in micro controller?

I have doubt that will micro controller supports multiplewill support multiple interrupt routineroutines for a single timer  .For

For example, single timer which interrupts at 5ms, 10ms,1s 1s etc.In In my design iI am using 3 timers in which: one timer interrupts for every 1ms for some status check,other other two at 50ms and 1s.I

I am curious to know about why cant ican't I have controller which has more than one ISR and also  ,instead instead of interrupts at timer overflow,why cant why can't it interrupt at its period match.

Is it possible to have multiple ISR routine for a single timer in micro controller?

I have doubt that will micro controller supports multiple interrupt routine for single timer  .For example single timer which interrupts at 5ms, 10ms,1s etc.In my design i am using 3 timers in which one timer interrupts for every 1ms for some status check,other two at 50ms and 1s.I am curious to know about why cant i have controller which has more than ISR and also  ,instead of interrupts at timer overflow,why cant it interrupt at its period match.

Is it possible to have multiple ISR routines for a single timer in micro controller?

I have doubt that micro controller will support multiple interrupt routines for a single timer.

For example, single timer which interrupts at 5ms, 10ms, 1s etc. In my design I am using 3 timers: one timer interrupts every 1ms for some status check, other two at 50ms and 1s.

I am curious to know about why can't I have controller which has more than one ISR and also, instead of interrupts at timer overflow, why can't it interrupt at its period match.

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tamil_innov
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I have doubt that will micro controller supports multiple interrupt routine for single timer .For example single timer which interrupts at 5ms, 10ms,1s etc.In my design i am using 3 timers in which one timer interrupts for every 1ms for some status check,other two at 50ms and 1s.I am curious to know about why cant i have controller which has more than ISR and also ,instead of interrupts at timer overflow,why cant it interrupt at its period match.

I have doubt that will micro controller supports multiple interrupt routine.For example single timer which interrupts at 5ms, 10ms,1s etc.In my design i am using 3 timers in which one timer interrupts for every 1ms for some status check,other two at 50ms and 1s.I am curious to know about why cant i have controller which has more than ISR and also ,instead of interrupts at timer overflow,why cant it interrupt at its period match.

I have doubt that will micro controller supports multiple interrupt routine for single timer .For example single timer which interrupts at 5ms, 10ms,1s etc.In my design i am using 3 timers in which one timer interrupts for every 1ms for some status check,other two at 50ms and 1s.I am curious to know about why cant i have controller which has more than ISR and also ,instead of interrupts at timer overflow,why cant it interrupt at its period match.

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tamil_innov
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I have doubt that will micro controller supports multiple interrupt routine.For example single timer which interrupts at 5ms, 10ms,1s etc.In my design i am using 3 timers in which one timer interrupts for every 1ms for some status check,other two at 50ms and 1s.I am curious to know about why cant i have controller which has more than ISR and also ,instead of interrupts at timer overflow,why cant it interrupt at its period match.

I have doubt that will micro controller supports multiple interrupt routine.For example single timer which interrupts at 5ms, 10ms,1s etc.

I have doubt that will micro controller supports multiple interrupt routine.For example single timer which interrupts at 5ms, 10ms,1s etc.In my design i am using 3 timers in which one timer interrupts for every 1ms for some status check,other two at 50ms and 1s.I am curious to know about why cant i have controller which has more than ISR and also ,instead of interrupts at timer overflow,why cant it interrupt at its period match.

Post Closed as "Needs details or clarity" by akohlsmith, Matt Young, PeterJ, Nick Alexeev, tcrosley
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Nick Alexeev
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tamil_innov
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