For your processor, the 8 bits in a value can be interpreted in two ways:

1. as an unsigned number, range 0 .. 255
2. as a 2s-complement number, range -128 .. +127

(There are other ways an 8-bit value can be interpreted, for instance as an ASCII character, as a sign-magnitude encoded value, or as two BCD digits.)

It is up to the code to choose the correct interpretation, the ALU does not know. Hence the ALU in effect calculates BOTH results. The nice part is that the 8-bit result pattern is the same for unsigned and 2s-complement addition. (This is the main reason for the popularity of 2s-complement.)

But the confusing part is that the interpretation of the 8-bit results and especially of the status bits is different, depending on the interpretation.

1. For unsigned addition, overflow occurs when there is a carry out of the 8'th bit. In your case this did not occur. Hence the Carry flag will be set to 'no carry'. In most chips this will be encoded as Carry = 0.
2. For 2s-complement addition, (as Ignacio explained), an overflow occurs when the carry from the 7th bit to the 8th bit is different from the carry out of the 8th bit. This is encoded in the V bit.

The result of your addition can be summarized as X = 0xB3, C = 0, V = 1. How that should be interpreted depends on how the two input values should be interpreted. In the were unsigned values, the result is 0xB3 and no overflow occurred. If they were 2s-complement overflow occurred, and hence the 0xB3 has no meaning. (If no overflow occurred it would be a negative value.) If the two values had any other interpretation the result is probably meaningless.

Side note: a lot of processors have (had?) an additional status flag: the half-carry, which indicated a carry from bit 4 to bit 5. This was used when the two values each represented two BCD digits.

For your processor, the 8 bits in a value can be interpreted in two ways:

1. as an unsigned number, range 0 .. 255
2. as a 2s-complement number, range -128 .. +127

(There are other ways an 8-bit value can be interpreted, for instance as an ASCII character, as a sign-magnitude encoded value, or as two BCD digits.)

It is up to the code to choose the correct interpretation, the ALU does not know. Hence the ALU in effect calculates BOTH results. The nice part is that the 8-bit result pattern is the same for unsigned and 2s-complement addition. (This is the main reason for the popularity of 2s-complement.)

But the confusing part is that the interpretation of the 8-bit results and especially of the status bits is different, depending on the interpretation.

1. For unsigned addition, overflow occurs when there is a carry out of the 8'th bit. In your case this did not occur. Hence the Carry flag will be set to 'no carry'. In most chips this will be encoded as Carry = 0.
2. For 2s-complement addition, (as Ignacio explained), an overflow occurs when the carry from the 7th bit to the 8th bit is different from the carry out of the 8th bit. This is encoded in the V bit.

The result of your addition can be summarized as X = 0xB3, C = 0, V = 1. How that should be interpreted depends on how the two input values should be interpreted. In the were unsigned values, the result is 0xB3 and no overflow occurred. If they were 2s-complement overflow occurred, and hence the 0xB3 has no meaning. (If no overflow occurred it would be a negative value.) If the two values had any other interpretation the result is probably meaningless.

Side note: a lot of processors have (had?) an additional status flag: the half-carry, which indicated a carry from bit 4 to bit 5. This was used when the two values each represented two BCD digits.

For your processor, the 8 bits in a value can be interpreted in two ways:

1. as an unsigned number, range 0 .. 255

2. as a 2s-complement number, range -128 .. +127

(There are other ways an 8-bit value can be interpreted, for instance as an ASCII character, as a sign-magnitute encoded value, or as two BCD digits.)

It is up to the code to choose the correct interpretation, the ALU does not know. Hence the ALU in effect calculates BOTH results. The nice part is that the 8-bit result pattern is the same for unsigned and 2s-complement addition. (This is the main reason for the popularity of 2s-complement.)

But the confusing part is that the interpretation of the 8-bit results and especially of the status bits is different, depending on the interpretation.

1. For unsigned addition, overflow occurs when there is a carry out of the 8'th bit. In your case this did not occur. Hence the Carry flag will be set to 'no carry'. In most chips this will be encoded as Carry = 0.

2. For 2s-complement addition, (as Ignacio explained), an overflow occurs when the carry from the 7th bit to the 8th bit is different from the carry out of the 8th bit. This is encoded in the V bit.

The result of your addition can be summarized as X = 0xB3, C = 0, V = 1. How that should be interpreted depends on how the two input values should be interpreted. In the were unsigned values, the result is 0xB3 and no overflow occurred. If they were 2s-complement overflow occurred, and hence the 0xB3 has no meaning. (If no overflow occurred it would be a negative value.) If the two values had any other interpretation the result is probably meaningless.

Side note: a lot of processors have (had?) an additional status flag: the half-carry, which indicated a carry from bit 4 to bit 5. This was used when the two values each represented two BCD digits.

For your processor, the 8 bits in a value can be interpreted in two ways:

1. as an unsigned number, range 0 .. 255
2. as a 2s-complement number, range -128 .. +127

(There are other ways an 8-bit value can be interpreted, for instance as an ASCII character, as a sign-magnitude encoded value, or as two BCD digits.)

It is up to the code to choose the correct interpretation, the ALU does not know. Hence the ALU in effect calculates BOTH results. The nice part is that the 8-bit result pattern is the same for unsigned and 2s-complement addition. (This is the main reason for the popularity of 2s-complement.)

But the confusing part is that the interpretation of the 8-bit results and especially of the status bits is different, depending on the interpretation.

1. For unsigned addition, overflow occurs when there is a carry out of the 8'th bit. In your case this did not occur. Hence the Carry flag will be set to 'no carry'. In most chips this will be encoded as Carry = 0.
2. For 2s-complement addition, (as Ignacio explained), an overflow occurs when the carry from the 7th bit to the 8th bit is different from the carry out of the 8th bit. This is encoded in the V bit.

The result of your addition can be summarized as X = 0xB3, C = 0, V = 1. How that should be interpreted depends on how the two input values should be interpreted. In the were unsigned values, the result is 0xB3 and no overflow occurred. If they were 2s-complement overflow occurred, and hence the 0xB3 has no meaning. (If no overflow occurred it would be a negative value.) If the two values had any other interpretation the result is probably meaningless.

Side note: a lot of processors have (had?) an additional status flag: the half-carry, which indicated a carry from bit 4 to bit 5. This was used when the two values each represented two BCD digits.