It is possible to build a circuit that provides a steady current source via these two methods: Screenshot of op amp circuit Screenshot of self-biasing JFET current source

In the circuit using an op amp, the current stays the same because as the resistance is increased, the voltage also increases (likewise for decreases). Thus, a steady current is maintained.

In the circuit using a JFET current source, there is negative feedback that maintains a steady drain current. This is because if the drain current increases, then \$R_S\$ increases, which makes \$V_{GS}\$ incerase and moves the FET closer to pinch-off, which then decreeases \$I_D\$.

What are some of the differences in performance of these two circuits which are intended to ultimately do the same thing (maintain a steady current)?