This is a convention to define positive voltages that says positive sources go into lower voltage sink loads with positive current.
Graphically the current direction is shown to down down from + to 0V . So it is still down to ground pulling from the + source.
Whereas a PNP sink is negative current from the ground source going up into the +ve supply in the negative direction.
But for enhanced channel FET’s the N ch source is negative like the NPN emitter and the drain is like the collector and when used a low side switch, it is sinking current into the “source pin” because it is the gate voltage must be positive well above threshold to bias on the gate charge to “source” pin. Even tho the drain NCh (+) is sinking current. It is also sinking positive current and visa versa for Pch FETs.