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Dec 23, 2022 at 21:06 answer added mike james timeline score: 4
Apr 13, 2017 at 12:32 history edited CommunityBot
replaced http://electronics.stackexchange.com/ with https://electronics.stackexchange.com/
May 12, 2016 at 3:12 history edited uint128_t CC BY-SA 3.0
Minor copy editing
May 11, 2016 at 19:24 history tweeted twitter.com/StackElectronix/status/730478737519677441
May 11, 2016 at 18:53 answer added stefandz timeline score: 11
May 11, 2016 at 18:29 answer added user4574 timeline score: 9
May 11, 2016 at 18:19 answer added Spehro 'speff' Pefhany timeline score: 12
May 11, 2016 at 18:07 history edited feetwet CC BY-SA 3.0
Clarified "break-down" per Andy's comments
May 11, 2016 at 17:56 comment added feetwet @Andyaka - I was using "break-down" loosely, to include transient events that would ideally not occur, probably wouldn't show up in a simulation, but which do show up in practice. E.g., cheap power supplies that don't provide very smooth power, or even inadequate ESD countermeasures. If the most sensitive piece of the circuit can be wired to survive transient break-downs then often we want to just keep working rather than scoping, stress-testing, and re-engineering the circuit to perfection.
May 11, 2016 at 17:36 comment added Wouter van Ooijen Note that the RG you show is useless as a protection mechanism unless the second pair of (zener) diodes is also present. It is voltage that destroys the gate isolation, not current.
May 11, 2016 at 17:29 comment added Andy aka If something has broken down who cares about the FET any more - the circuit is bust period.
May 11, 2016 at 17:15 answer added fhlb timeline score: 24
May 11, 2016 at 16:53 answer added Darko timeline score: 35
May 11, 2016 at 16:49 history asked feetwet CC BY-SA 3.0