Timeline for Why would you stack a resistor and capacitor on top of each other?
Current License: CC BY-SA 3.0
24 events
| when toggle format | what | by | license | comment | |
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| Jul 27, 2016 at 7:14 | comment | added | Andy aka | @Seth - that photodiode has 3000 pF self capacitance and this means that the engineer who designed the circuit has no idea what he is doing - that 4 pF value will be wrong and the circuit will suffer from really bad noise values. The 4 pF should be a lot higher and the need to have it on-top of the resistor is now negated. If the photodiode were maybe ~40 pF then yes there might be a reason but not when it is 3000 pF!!! | |
| Jul 26, 2016 at 23:52 | comment | added | pipe | This question reminded me about the Reverse RIAA Equaliser over at the Elliott Sound Products, where he fits a simple passive stereo equalizer in a connector by stacking 12 0805 passives. | |
| Jul 26, 2016 at 23:15 | comment | added | Seth | @Andyaka The inverting input is fed by a PIN diode, the data sheet of which is available at the link in the Q. The diode is reverse-biased. | |
| Jul 26, 2016 at 21:04 | history | tweeted | twitter.com/StackElectronix/status/758045292352638976 | ||
| Jul 26, 2016 at 19:22 | comment | added | Andy aka | @Seth you have accepted the answer but you've only shown half the circuit - what connects to the inverting input i.e. what circuitry feeds it. I have a suspicion in my mind that there lies the answer. | |
| Jul 26, 2016 at 18:30 | vote | accept | Seth | ||
| Jul 26, 2016 at 17:51 | history | edited | Seth | CC BY-SA 3.0 |
Update details of circuit
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| Jul 26, 2016 at 17:24 | answer | added | Spehro 'speff' Pefhany | timeline score: 17 | |
| Jul 26, 2016 at 17:20 | comment | added | Voltage Spike♦ | If you want to make a single footprint, you can designate it what you want, but in assembly and on the BOM you will have to specify what makes sense to the assembly house your using. Usually they hand-solder parts like this on and you can put in a special note on the BOM that you would like a cap with a resistor soldered on top. Pulse shaping circuits like this can be used to "widen" a pulse so it can be discriminated later by a comparator, assuming that the pulses don't come in very fast (next to each other). Is this circuit attached to a sensor? What is it? | |
| Jul 26, 2016 at 17:20 | comment | added | Seth | Thanks for the comments! The values provided are the values populated on the board. There are ground plane cut-outs to minimize stray capacitance. The board is sparely-populated, so they weren't trying to minimize space. | |
| Jul 26, 2016 at 17:08 | comment | added | DerStrom8 | @Andyaka I was writing a comment but apparently I never hit enter. I was wondering if the schematic provided has actual values, or if it is just an example. You're right, from a stray inductance point of view this really doesn't make much sense based on the provided values. It makes me wonder if there are other reasons (which I have added to my answer). | |
| Jul 26, 2016 at 17:03 | comment | added | Andy aka | @DerStrom8 even if there were 10 nH leakage inductance it would resonate (with 4 pF) at 800MHz - makes no sense given the roll-off point of 40 kHz. | |
| Jul 26, 2016 at 17:00 | comment | added | Eugene Sh. | @ThePhoton Yeah, it is reducing this possibility. | |
| Jul 26, 2016 at 17:00 | comment | added | Andy aka | The first problem is that the OPA846 isn't stable at gains below 7 so without detail of the "so-called" current source this question looks dead to me. More likely the engineer has "learnt" this trick from a design that used it for a different reason. | |
| Jul 26, 2016 at 16:59 | comment | added | The Photon | @EugeneSh., except for the fact the silkscreen has both designators. | |
| Jul 26, 2016 at 16:57 | comment | added | Eugene Sh. | It could be just a workaround for incorrectly designed PCB. | |
| Jul 26, 2016 at 16:55 | comment | added | The Photon | The circuit has a 40 kHz corner frequency. I don't think stray inductance is an issue here. However, given the 4 pF designed capacitance, minimizing stray capacitance might be what's intended. I'd also look carefully at layout features like ground cut-outs below these parts and the wires connecting to them. | |
| Jul 26, 2016 at 16:54 | comment | added | DerStrom8 | @Andyaka It eliminates the need for traces between the components, traces which would most likely be longer and narrower than simply stacking the components. | |
| Jul 26, 2016 at 16:54 | comment | added | Andy aka | Why or how does it deal with stray inductance? | |
| Jul 26, 2016 at 16:47 | history | edited | Seth | CC BY-SA 3.0 |
Corrected R/C labelling
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| Jul 26, 2016 at 16:47 | answer | added | DerStrom8 | timeline score: 7 | |
| Jul 26, 2016 at 16:43 | review | First posts | |||
| Jul 26, 2016 at 17:20 | |||||
| Jul 26, 2016 at 16:42 | comment | added | Ignacio Vazquez-Abrams | That's certainly a way to deal with stray inductance... | |
| Jul 26, 2016 at 16:42 | history | asked | Seth | CC BY-SA 3.0 |