Timeline for How is a DRAM volatile with capacitors?
Current License: CC BY-SA 3.0
17 events
when toggle format | what | by | license | comment | |
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Apr 1, 2018 at 5:20 | comment | added | GypsyCosmonaut | @R.. Yes, it was, by mistake. Sorry. Approved your correction. Thanks | |
S Apr 1, 2018 at 5:19 | history | suggested | forest | CC BY-SA 3.0 |
question is mixing up volatile and non-volatile
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Apr 1, 2018 at 5:12 | review | Suggested edits | |||
S Apr 1, 2018 at 5:19 | |||||
Apr 1, 2018 at 5:07 | vote | accept | GypsyCosmonaut | ||
Apr 1, 2018 at 4:49 | comment | added | R.. GitHub STOP HELPING ICE | Unless I'm misreading the question is using the terms volatile and non-volatile backwards...? | |
Mar 31, 2018 at 23:58 | history | tweeted | twitter.com/StackElectronix/status/980233014629281792 | ||
S Mar 31, 2018 at 19:18 | history | suggested | Peter Mortensen | CC BY-SA 3.0 |
Copy edited (but can "DRAM" be singular?).
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Mar 31, 2018 at 19:05 | review | Suggested edits | |||
S Mar 31, 2018 at 19:18 | |||||
Mar 31, 2018 at 13:03 | answer | added | Spehro 'speff' Pefhany | timeline score: 25 | |
Mar 31, 2018 at 12:39 | comment | added | Long Pham | DRAM must be refreshed periodically because capacitor's leakage | |
Mar 31, 2018 at 10:25 | comment | added | Harry Svensson | @peufeu If I recall correctly, the capacitor (gate) of the NANDs are pulled really high or very low (in V) to force a really strong 1 or a really strong 0. And every time you change the charge in the gate you destroy the gate slightly. In analog FPGAs you set a specific voltage at the gate which makes it behave more like a resistor, imagine an inverting amplifier (op-amp), but instead of resistors, you use two transistors with a specific charge on the gate. - That's how I think it is. I'm no expert though. | |
Mar 31, 2018 at 10:24 | history | edited | JRE | CC BY-SA 3.0 |
deleted 2 characters in body; edited title
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Mar 31, 2018 at 10:20 | history | edited | GypsyCosmonaut | CC BY-SA 3.0 |
added 180 characters in body
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Mar 31, 2018 at 10:17 | comment | added | bobflux | @HarrySvensson are the latter similar to flash memory? | |
Mar 31, 2018 at 10:15 | comment | added | Harry Svensson | This question would be much better if it asked why the capacitors in DRAM needs to be updated, yet the capacitors in the gates in analog FPGA's somehow retains their charge. | |
Mar 31, 2018 at 10:15 | review | First posts | |||
Mar 31, 2018 at 12:47 | |||||
Mar 31, 2018 at 10:13 | history | asked | GypsyCosmonaut | CC BY-SA 3.0 |