Timeline for how do I implement a start timer in a digital circuit

8 events

when toggle format	what		by	license	comment
Oct 8, 2018 at 6:21	vote	accept	Cit5
Oct 8, 2018 at 6:12	comment	added	Cit5		my trigger signal is from a circuit that checks if an event happens. but the event only happens once every so often. I want my counter to start only when the signal is active high. however, when it is active high, it will only be in that state for one clock cycle. so if I use that signal for my enable in my counter, my counter will stop after the first cycle is done. I also want to restart the counter again, once the trigger signal is active high again (which should be long after the counter ends).
Oct 8, 2018 at 6:09	comment	added	Cit5		@Damien Umm hardware but not HDL behavioral. I want to actually understand the circuit. But now that I think about it even more, Im realizing I'm not experimenting with Dff or other sequential logic modules enough.
Oct 8, 2018 at 5:40	history	edited	Blair Fonville		Added vhdl tag.
Oct 8, 2018 at 5:40	answer	added	po.pe		timeline score: 0
Oct 8, 2018 at 5:32	answer	added	Blair Fonville		timeline score: 1
Oct 8, 2018 at 5:26	comment	added	Damien		Your question is not clear, Do you want to have a hardware circuit or software solution ? Can you rephrase "I could add logic to check if my trigger is active high (1 and-ed to my signal) but then it will go inactive after 1 clock cycle."?
Oct 8, 2018 at 4:45	history	asked	Cit5	CC BY-SA 4.0